用于空间应用的高效LDPC编码器架构

D. Theodoropoulos, N. Kranitis, A. Paschalis
{"title":"用于空间应用的高效LDPC编码器架构","authors":"D. Theodoropoulos, N. Kranitis, A. Paschalis","doi":"10.1109/IOLTS.2016.7604689","DOIUrl":null,"url":null,"abstract":"Quasi-Cyclic Low-Density Parity-Check Codes (QC-LDPC) have been recently adopted by the Consultative Committee for Space Data Systems (CCSDS) as recommended standard for channel coding in near-earth (C2) and deep-space (AR4JA) communications. Existing QC-LDPC encoder architectures proposed in the literature so far, are optimized for other standards (e.g. DVB-S2, IEEE 802.11e), but they are not suitable for efficient implementations for the specific CCSDS codes. In this paper, we introduce for the first time a novel encoder architecture, suitable for these codes. The architecture is a parallel implementation based on a series of recursive convolutional encoders and it leverages the inherent parallelism of generator's matrix QC structure to boost throughput performance. Furthermore, the generic definition of key encoder's parameters provides increased flexibility in terms of latency, FPGA resources and speed. In the special case of C2 code for near-earth communications, a novel architecture is introduced to efficiently handle the challenges arising from the generator's matrix circulant size (511 bits), which is not a power of 2. The proposed encoders operate on a continuous uninterrupted stream of input data and implement all the functions specified by CCSDS data-link layer protocols (i.e. framing, synchronization and randomization). The efficiency of the introduced architecture is demonstrated on a Xilinx XUPV5 development board, achieving multi-Gbps throughput and a significant speed-up when compared with existing approaches.","PeriodicalId":6580,"journal":{"name":"2016 IEEE 22nd International Symposium on On-Line Testing and Robust System Design (IOLTS)","volume":"17 1","pages":"149-154"},"PeriodicalIF":0.0000,"publicationDate":"2016-07-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"12","resultStr":"{\"title\":\"An efficient LDPC encoder architecture for space applications\",\"authors\":\"D. Theodoropoulos, N. Kranitis, A. Paschalis\",\"doi\":\"10.1109/IOLTS.2016.7604689\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Quasi-Cyclic Low-Density Parity-Check Codes (QC-LDPC) have been recently adopted by the Consultative Committee for Space Data Systems (CCSDS) as recommended standard for channel coding in near-earth (C2) and deep-space (AR4JA) communications. Existing QC-LDPC encoder architectures proposed in the literature so far, are optimized for other standards (e.g. DVB-S2, IEEE 802.11e), but they are not suitable for efficient implementations for the specific CCSDS codes. In this paper, we introduce for the first time a novel encoder architecture, suitable for these codes. The architecture is a parallel implementation based on a series of recursive convolutional encoders and it leverages the inherent parallelism of generator's matrix QC structure to boost throughput performance. Furthermore, the generic definition of key encoder's parameters provides increased flexibility in terms of latency, FPGA resources and speed. In the special case of C2 code for near-earth communications, a novel architecture is introduced to efficiently handle the challenges arising from the generator's matrix circulant size (511 bits), which is not a power of 2. The proposed encoders operate on a continuous uninterrupted stream of input data and implement all the functions specified by CCSDS data-link layer protocols (i.e. framing, synchronization and randomization). The efficiency of the introduced architecture is demonstrated on a Xilinx XUPV5 development board, achieving multi-Gbps throughput and a significant speed-up when compared with existing approaches.\",\"PeriodicalId\":6580,\"journal\":{\"name\":\"2016 IEEE 22nd International Symposium on On-Line Testing and Robust System Design (IOLTS)\",\"volume\":\"17 1\",\"pages\":\"149-154\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-07-04\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"12\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 IEEE 22nd International Symposium on On-Line Testing and Robust System Design (IOLTS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IOLTS.2016.7604689\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE 22nd International Symposium on On-Line Testing and Robust System Design (IOLTS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IOLTS.2016.7604689","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 12

摘要

准循环低密度奇偶校验码(QC-LDPC)最近被空间数据系统咨询委员会(CCSDS)采纳为近地(C2)和深空(AR4JA)通信信道编码的推荐标准。到目前为止,文献中提出的现有QC-LDPC编码器架构针对其他标准(例如DVB-S2, IEEE 802.11e)进行了优化,但它们不适合针对特定的CCSDS代码进行有效实现。在本文中,我们首次介绍了一种适用于这些编码的新型编码器结构。该架构是基于一系列递归卷积编码器的并行实现,并利用生成器矩阵QC结构固有的并行性来提高吞吐量性能。此外,密钥编码器参数的通用定义在延迟、FPGA资源和速度方面提供了更大的灵活性。在近地通信C2码的特殊情况下,引入了一种新的架构来有效地处理发电机矩阵循环大小(511位)所带来的挑战,该矩阵循环大小不是2的幂次。所提出的编码器在连续不间断的输入数据流上运行,并实现CCSDS数据链路层协议规定的所有功能(即分帧,同步和随机化)。在Xilinx XUPV5开发板上演示了所介绍架构的效率,与现有方法相比,实现了数gbps的吞吐量和显着的加速。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
An efficient LDPC encoder architecture for space applications
Quasi-Cyclic Low-Density Parity-Check Codes (QC-LDPC) have been recently adopted by the Consultative Committee for Space Data Systems (CCSDS) as recommended standard for channel coding in near-earth (C2) and deep-space (AR4JA) communications. Existing QC-LDPC encoder architectures proposed in the literature so far, are optimized for other standards (e.g. DVB-S2, IEEE 802.11e), but they are not suitable for efficient implementations for the specific CCSDS codes. In this paper, we introduce for the first time a novel encoder architecture, suitable for these codes. The architecture is a parallel implementation based on a series of recursive convolutional encoders and it leverages the inherent parallelism of generator's matrix QC structure to boost throughput performance. Furthermore, the generic definition of key encoder's parameters provides increased flexibility in terms of latency, FPGA resources and speed. In the special case of C2 code for near-earth communications, a novel architecture is introduced to efficiently handle the challenges arising from the generator's matrix circulant size (511 bits), which is not a power of 2. The proposed encoders operate on a continuous uninterrupted stream of input data and implement all the functions specified by CCSDS data-link layer protocols (i.e. framing, synchronization and randomization). The efficiency of the introduced architecture is demonstrated on a Xilinx XUPV5 development board, achieving multi-Gbps throughput and a significant speed-up when compared with existing approaches.
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