用CVD掺杂法制备高质量的Ge衬底N+/P结

Jae Hwan Kim, S. Shin, T. Lee, W. Hwang, B. Cho
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引用次数: 0

摘要

本文首次成功地提出了一种利用CVD (iCVD)掺杂聚合物膜在Ge衬底上共掺杂P和Sn的新方案。该优化的掺杂工艺提供了高载流子浓度的n型掺杂,掺杂量为3 $\乘以10^{20}\ mathm {cm}^{-3}$,结深为50 nm。P载流子浓度的提高主要是由于注入掺杂剂时产生的点缺陷较少,以及Sn与P共掺杂在Ge衬底中产生的应变缓解效应。与传统离子注入的Ge nmosfet相比,在源极/漏极区掺杂co-iCVD的Ge nmosfet具有更低的关闭状态泄漏电流、更高的开启电流值和更低的接触电阻率。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
High Quality N+/P Junction of Ge Substrate Prepared by initiated CVD Doping Process
For the first time, a novel co-doping scheme of P and Sn into Ge substrate using an initiated CVD (iCVD) dopant-containing polymer film is successfully developed. This optimized doping process provides high carrier concentration n-type doping of 3 $\times 10^{20}\mathrm{cm}^{-3}$ with a shallow junction depth of 50 nm. The enhancement of the P carrier concentration is attributed to less point defect generation during dopant injection and the strain relief effect induced by Sn co-doping with P into the Ge substrate. The Ge nMOSFETs with co-iCVD doping at the source/drain regions show lower off-state leakage current, higher on-current values, and lower contact resistivity compared to the Ge nMOSFETs with conventional ion implantation.
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