A Simulated Study of 65 nm CMOS 2GHz Front-End Preamplifier Circuit for Optical Fiber Applications

In this research a new design of the transimpedance amplifier (TIA) with the current mirror was employed by the technique (65nm). The TIA consists of a common gate transistor amplifier (CG TIA) and a common source amplifier as an input stage with local active feedback with a second stage of a current mirror and local active feedback to increase gain. In order to verify the performance of the proposed TIA, a circuit simulation was carried out in the LT spice program using coefficients with the technique (65nm CMOS). The simulation results indicate that the interfacial impedance gain is (41 dBΩ) at a bandwidth frequency of (2.0 GHz-3dB) for an input capacitor of (100 fF) and an input referred noise current spectral density of (14 pA/√Hz) and a power consumption value of (0.091 mw) at an applied voltage (1V). The main focus of this research is low consumption of power and voltage compared to another research.