采用0.25 /spl mu/m数字CMOS技术的50-mW 14位2.5 ms /s /spl Sigma/-/spl Delta/调制器

2000 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.00CH37103) Pub Date : 2000-06-15 DOI:10.1109/VLSIC.2000.852873

P. Balmelli, Qiuting Huang, F. Piazza

{"title":"采用0.25 /spl mu/m数字CMOS技术的50-mW 14位2.5 ms /s /spl Sigma/-/spl Delta/调制器","authors":"P. Balmelli, Qiuting Huang, F. Piazza","doi":"10.1109/VLSIC.2000.852873","DOIUrl":null,"url":null,"abstract":"A 5/sup th/-order single-loop /spl Sigma/-/spl Delta/ modulator has been implemented in a 0.25 /spl mu/m digital CMOS process, where the supply voltage is only 2.5 V and the capacitor option is not available. A tri-level quantizer is used to improve loop stability. The sampling frequency of the modulator is 80 MHz and the oversampling ratio is 32. Measured over a 1 MHz signal bandwidth, dynamic range is 86 dB, peak SNR is 80 dB and peak SNDR is 78 dB. The modulator consumes only 50 mW.","PeriodicalId":6361,"journal":{"name":"2000 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.00CH37103)","volume":"47 1","pages":"142-143"},"PeriodicalIF":0.0000,"publicationDate":"2000-06-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":"{\"title\":\"A 50-mW 14-bit 2.5-MS/s /spl Sigma/-/spl Delta/ modulator in a 0.25 /spl mu/m digital CMOS technology\",\"authors\":\"P. Balmelli, Qiuting Huang, F. Piazza\",\"doi\":\"10.1109/VLSIC.2000.852873\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A 5/sup th/-order single-loop /spl Sigma/-/spl Delta/ modulator has been implemented in a 0.25 /spl mu/m digital CMOS process, where the supply voltage is only 2.5 V and the capacitor option is not available. A tri-level quantizer is used to improve loop stability. The sampling frequency of the modulator is 80 MHz and the oversampling ratio is 32. Measured over a 1 MHz signal bandwidth, dynamic range is 86 dB, peak SNR is 80 dB and peak SNDR is 78 dB. The modulator consumes only 50 mW.\",\"PeriodicalId\":6361,\"journal\":{\"name\":\"2000 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.00CH37103)\",\"volume\":\"47 1\",\"pages\":\"142-143\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2000-06-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"8\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2000 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.00CH37103)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIC.2000.852873\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2000 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.00CH37103)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIC.2000.852873","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 8

摘要

在0.25 /spl mu/m的数字CMOS工艺中实现了一个5/sup /阶单回路/spl Sigma/-/spl Delta/调制器，其中电源电压仅为2.5 V，电容器选项不可用。采用三电平量化器提高回路稳定性。调制器的采样频率为80mhz，过采样比为32。在1 MHz信号带宽上测量，动态范围为86 dB，峰值信噪比为80 dB，峰值信噪比为78 dB。调制器仅消耗50mw。

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A 50-mW 14-bit 2.5-MS/s /spl Sigma/-/spl Delta/ modulator in a 0.25 /spl mu/m digital CMOS technology

A 5/sup th/-order single-loop /spl Sigma/-/spl Delta/ modulator has been implemented in a 0.25 /spl mu/m digital CMOS process, where the supply voltage is only 2.5 V and the capacitor option is not available. A tri-level quantizer is used to improve loop stability. The sampling frequency of the modulator is 80 MHz and the oversampling ratio is 32. Measured over a 1 MHz signal bandwidth, dynamic range is 86 dB, peak SNR is 80 dB and peak SNDR is 78 dB. The modulator consumes only 50 mW.

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2000 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.00CH37103)

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