{"title":"基于半加性工艺的非均匀集成亚微米尺度Cu RDL图案","authors":"T. Takano, H. Kudo, Masaya Tanaka, M. Akazawa","doi":"10.1109/ECTC.2019.00022","DOIUrl":null,"url":null,"abstract":"Use of dry plasma etching rather than wet etching of a Cu-seed layer in a semi-additive process enabled more precise dimension controllability in the patterning of submicron-scale Cu traces due to no shift in the width of the traces. This controllability is comparable to that of competitive fabrication technologies such as that for damascene-based Cu redistribution layers. The dry etching enabled the patterning of Cu traces with an aspect ratio as high as 4.2 (L/S=0.7/0.7 µm, 3.0 µm in height) without any failures such as electrical shorts between traces. Simulation showed that an increase in the aspect ratio effectively reduced signal transmission loss due to a reduction in conductor loss. The dry etching provided very smooth surfaces on the Cu-trace side-wall (roughness as low as 0.05 µm). This further reduced the signal transmission loss compared to that of wet-etched Cu traces. Submicron-scale patterning of Cu traces using dry etching enables flexible design of redistribution layer lines in terms of signal integrity, in addition to increasing the number of signal I/Os cost effectively.","PeriodicalId":6726,"journal":{"name":"2019 IEEE 69th Electronic Components and Technology Conference (ECTC)","volume":"2 1","pages":"94-100"},"PeriodicalIF":0.0000,"publicationDate":"2019-05-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":"{\"title\":\"Submicron-Scale Cu RDL Pattering Based on Semi-Additive Process for Heterogeneous Integration\",\"authors\":\"T. Takano, H. Kudo, Masaya Tanaka, M. Akazawa\",\"doi\":\"10.1109/ECTC.2019.00022\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Use of dry plasma etching rather than wet etching of a Cu-seed layer in a semi-additive process enabled more precise dimension controllability in the patterning of submicron-scale Cu traces due to no shift in the width of the traces. This controllability is comparable to that of competitive fabrication technologies such as that for damascene-based Cu redistribution layers. The dry etching enabled the patterning of Cu traces with an aspect ratio as high as 4.2 (L/S=0.7/0.7 µm, 3.0 µm in height) without any failures such as electrical shorts between traces. Simulation showed that an increase in the aspect ratio effectively reduced signal transmission loss due to a reduction in conductor loss. The dry etching provided very smooth surfaces on the Cu-trace side-wall (roughness as low as 0.05 µm). This further reduced the signal transmission loss compared to that of wet-etched Cu traces. Submicron-scale patterning of Cu traces using dry etching enables flexible design of redistribution layer lines in terms of signal integrity, in addition to increasing the number of signal I/Os cost effectively.\",\"PeriodicalId\":6726,\"journal\":{\"name\":\"2019 IEEE 69th Electronic Components and Technology Conference (ECTC)\",\"volume\":\"2 1\",\"pages\":\"94-100\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-05-28\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"8\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2019 IEEE 69th Electronic Components and Technology Conference (ECTC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ECTC.2019.00022\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE 69th Electronic Components and Technology Conference (ECTC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ECTC.2019.00022","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Submicron-Scale Cu RDL Pattering Based on Semi-Additive Process for Heterogeneous Integration
Use of dry plasma etching rather than wet etching of a Cu-seed layer in a semi-additive process enabled more precise dimension controllability in the patterning of submicron-scale Cu traces due to no shift in the width of the traces. This controllability is comparable to that of competitive fabrication technologies such as that for damascene-based Cu redistribution layers. The dry etching enabled the patterning of Cu traces with an aspect ratio as high as 4.2 (L/S=0.7/0.7 µm, 3.0 µm in height) without any failures such as electrical shorts between traces. Simulation showed that an increase in the aspect ratio effectively reduced signal transmission loss due to a reduction in conductor loss. The dry etching provided very smooth surfaces on the Cu-trace side-wall (roughness as low as 0.05 µm). This further reduced the signal transmission loss compared to that of wet-etched Cu traces. Submicron-scale patterning of Cu traces using dry etching enables flexible design of redistribution layer lines in terms of signal integrity, in addition to increasing the number of signal I/Os cost effectively.