F. Inoue, H. Philipsen, M. H. van der Veen, S. Van Huylenbroeck, S. Armini, H. Struyf, T. Tanaka
{"title":"高纵横比TSV中Ru和Co衬里化学镀铜","authors":"F. Inoue, H. Philipsen, M. H. van der Veen, S. Van Huylenbroeck, S. Armini, H. Struyf, T. Tanaka","doi":"10.1109/IITC.2014.6831871","DOIUrl":null,"url":null,"abstract":"High aspect ratio through-silicon vias (3 μm diameter by 50 μm depth) have been filled by standard Cu plating process on electroless deposited (ELD) Cu seed layers on conformal liners of Ru or Co. The in-field Cu overburden that was needed to achieve electrochemical fill on the ELD-Cu seed was 600 nm. This is much lower than would have been needed in a conventional scheme with a PVD-Cu seed (of ~ 1500 nm) and, with that, reduces the Cu CMP time. This work shows the feasibility of Cu electroless as deposition technique in a TSV metallization process.","PeriodicalId":6823,"journal":{"name":"2021 IEEE International Interconnect Technology Conference (IITC)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2014-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"Electroless Cu seed on Ru and Co liners in high aspect ratio TSV\",\"authors\":\"F. Inoue, H. Philipsen, M. H. van der Veen, S. Van Huylenbroeck, S. Armini, H. Struyf, T. Tanaka\",\"doi\":\"10.1109/IITC.2014.6831871\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"High aspect ratio through-silicon vias (3 μm diameter by 50 μm depth) have been filled by standard Cu plating process on electroless deposited (ELD) Cu seed layers on conformal liners of Ru or Co. The in-field Cu overburden that was needed to achieve electrochemical fill on the ELD-Cu seed was 600 nm. This is much lower than would have been needed in a conventional scheme with a PVD-Cu seed (of ~ 1500 nm) and, with that, reduces the Cu CMP time. This work shows the feasibility of Cu electroless as deposition technique in a TSV metallization process.\",\"PeriodicalId\":6823,\"journal\":{\"name\":\"2021 IEEE International Interconnect Technology Conference (IITC)\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2014-05-20\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2021 IEEE International Interconnect Technology Conference (IITC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IITC.2014.6831871\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 IEEE International Interconnect Technology Conference (IITC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IITC.2014.6831871","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Electroless Cu seed on Ru and Co liners in high aspect ratio TSV
High aspect ratio through-silicon vias (3 μm diameter by 50 μm depth) have been filled by standard Cu plating process on electroless deposited (ELD) Cu seed layers on conformal liners of Ru or Co. The in-field Cu overburden that was needed to achieve electrochemical fill on the ELD-Cu seed was 600 nm. This is much lower than would have been needed in a conventional scheme with a PVD-Cu seed (of ~ 1500 nm) and, with that, reduces the Cu CMP time. This work shows the feasibility of Cu electroless as deposition technique in a TSV metallization process.