90至300 K范围内Ge/sub -x/ Si/sub - 1-x/沟道mosfet的迁移率增强和量子力学建模

International Electron Devices Meeting 1991 [Technical Digest] Pub Date : 1991-12-08 DOI:10.1109/IEDM.1991.235431

P. Garone, V. Venkataraman, J. Sturn

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引用次数: 2

摘要

在室温下，Ge/sub -x/ Si/sub - 1-x/埋道pmosfet的空穴反转层迁移率达到290 cm/sup 2//V-s。在90k时，迁移率峰值达到970 cm/sup 2//V-s。这相当于在室温下有效迁移率比Si控制器件提高了50%，在90k下提高了100%以上。考虑表面散射与载流子与Si/SiO/sub - 2/界面平均距离的关系，可以在室温下有效地模拟mos门控Ge/sub -x/ Si/sub - 1-x/埋道晶体管的迁移率。利用从硅控制装置中提取的参数，对具有75-AA和105-AA硅隔离层的器件的迁移率进行了测试，并在室温下精确建模。在低温下(约90k)，为了更好地拟合数据，必须加入额外的散射项。这一附加项可能是由于合金在Ge/sub -x/ Si/sub - 1-x/通道中的散射

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Mobility enhancement and quantum mechanical modeling in Ge/sub x/Si/sub 1-x/ channel MOSFETs from 90 to 300 K

A peak hole inversion layer mobility of 290 cm/sup 2//V-s has been achieved at room temperature in Ge/sub x/Si/sub 1-x/ buried channel pMOSFETs. The peak mobility rises to 970 cm/sup 2//V-s at 90 K. This corresponds to a 50% enhancement in the effective mobility over Si control devices at room temperature and enhancements of over 100% at 90 K. The mobility of MOS-gated Ge/sub x/Si/sub 1-x/ buried channel transistors can be effectively modeled at room temperature by considering the dependence of the surface scattering on the average separation of carriers from the Si/SiO/sub 2/ interface. The mobility for devices with a 75-AA and a 105-AA Si spacer layer was tested and accurately modeled at room temperature using parameters extracted from a Si control device. At low temperatures ( approximately 90 K) an additional scattering term must be included to better fit the data. It is suggested that this additional term could result from alloy scattering in the Ge/sub x/Si/sub 1-x/ channel.<>

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International Electron Devices Meeting 1991 [Technical Digest]

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