Reliability Demonstration of Reflow Qualified 22nm STT -MRAM for Embedded Memory Applications

In this paper, we thoroughly demonstrate the reliability of reflow qualified embedded S TT - MRAM integrated on 22nm technology. We show that STT-MRAM is capable of 1E5 endurance cycles across temperature (-40, 25 and 125°C) with extremely low fail bit rates (mean 0.04 ppm for −40°C) and can pass 1M cycle endurance using an enhanced process. Bit error rates (BERs) post three cycles of solder reflow at 260°C are below 1 ppm for both parallel (P) and anti-parallel (AP) storage states. Due to the associated high energy barrier for flipping states, chips can meet a very high retention lifetime spec (>200°C at 10yrs, BER 1 ppm) with a large margin. The balance of retention performance between the two states can be adjusted in an optimized process. In addition, we investigate the impact of magnetic field applied at tilted angles and report standby magnetic field immunity can reach 600 Oe at 125°C for 10 years for fields tilted 60 degrees from parallel to the die surface. Magnetic shields are demonstrated to sustain data exposed to perpendicular fields up to 3.5k Oe at 25°C for 100 hours.