{"title":"PRML磁盘驱动器读通道的约束不对称LMS算法","authors":"R. Staszewski, K. Muhammad, P. Balsara","doi":"10.1109/ACSSC.2000.910992","DOIUrl":null,"url":null,"abstract":"We present an implementation of a constrained least mean square (C-LMS) algorithm with application to magnetic disk drive read channels. The main advantage offered by the presented C-LMS algorithm is improved stability of the outer timing recovery loop while the spectral shaping of read-back data is performed in the inner adaptation loop. This eliminates any unstable behavior of the timing recovery loop during C-LMS algorithm adaptation. The proposed algorithm has been implemented and fabricated in a commercial read-channel using a 0.18 /spl mu/m L/sub eff/ CMOS technology. It operates at 550 MHz worst case.","PeriodicalId":10581,"journal":{"name":"Conference Record of the Thirty-Fourth Asilomar Conference on Signals, Systems and Computers (Cat. No.00CH37154)","volume":"30 1","pages":"433-437 vol.1"},"PeriodicalIF":0.0000,"publicationDate":"2000-10-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"A constrained asymmetry LMS algorithm for PRML disk drive read channels\",\"authors\":\"R. Staszewski, K. Muhammad, P. Balsara\",\"doi\":\"10.1109/ACSSC.2000.910992\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We present an implementation of a constrained least mean square (C-LMS) algorithm with application to magnetic disk drive read channels. The main advantage offered by the presented C-LMS algorithm is improved stability of the outer timing recovery loop while the spectral shaping of read-back data is performed in the inner adaptation loop. This eliminates any unstable behavior of the timing recovery loop during C-LMS algorithm adaptation. The proposed algorithm has been implemented and fabricated in a commercial read-channel using a 0.18 /spl mu/m L/sub eff/ CMOS technology. It operates at 550 MHz worst case.\",\"PeriodicalId\":10581,\"journal\":{\"name\":\"Conference Record of the Thirty-Fourth Asilomar Conference on Signals, Systems and Computers (Cat. No.00CH37154)\",\"volume\":\"30 1\",\"pages\":\"433-437 vol.1\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2000-10-29\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Conference Record of the Thirty-Fourth Asilomar Conference on Signals, Systems and Computers (Cat. No.00CH37154)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ACSSC.2000.910992\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Conference Record of the Thirty-Fourth Asilomar Conference on Signals, Systems and Computers (Cat. No.00CH37154)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ACSSC.2000.910992","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5
摘要
我们提出了一种约束最小均方(C-LMS)算法的实现,并应用于磁盘驱动器读通道。所提出的C-LMS算法的主要优点是提高了外部时序恢复环路的稳定性,而内部自适应环路对回读数据进行频谱整形。这消除了在C-LMS算法适应期间定时恢复环路的任何不稳定行为。该算法采用0.18 /spl μ m / L/sub / CMOS技术在商业读通道中实现和制造。最坏的情况下,它的工作频率是550兆赫。
A constrained asymmetry LMS algorithm for PRML disk drive read channels
We present an implementation of a constrained least mean square (C-LMS) algorithm with application to magnetic disk drive read channels. The main advantage offered by the presented C-LMS algorithm is improved stability of the outer timing recovery loop while the spectral shaping of read-back data is performed in the inner adaptation loop. This eliminates any unstable behavior of the timing recovery loop during C-LMS algorithm adaptation. The proposed algorithm has been implemented and fabricated in a commercial read-channel using a 0.18 /spl mu/m L/sub eff/ CMOS technology. It operates at 550 MHz worst case.