A. Arun, C. Gupta, R. Howe
{"title":"聚醚醚酮(PEEK)流体电池在硅衬底微电极上的电化学研究","authors":"A. Arun, C. Gupta, R. Howe","doi":"10.1149/2.0021510SSL","DOIUrl":null,"url":null,"abstract":"A robust fixture is designed as a fluidic cell, for studying electrochemistry of planar nano/microelectrodes and electrolyte interface. The microelectrode is fabricated using standard silicon micromachining processes on a silicon wafer. The fluidic cell is built using polyether ether ketone (PEEK). The PEEK structure is machined with alignment pins and the silicon wafer is fabricated with complementary alignment fields. This ensures that the electrodes on the silicon wafer are precisely aligned to the fluidic channel and there is minimal parasitic capacitance due to the overlap of the electrode with the conducting electrolyte in the system. The set-up was used to measure current flow across the electrode-electrolyte interface. Using the set-up gold-thiol interface of area with an opening of diameter 1 μm was characterized. © 2015 The Electrochemical Society. [DOI: 10.1149/2.0021510ssl] All rights reserved.","PeriodicalId":11423,"journal":{"name":"ECS Solid State Letters","volume":"99 1","pages":"67"},"PeriodicalIF":0.0000,"publicationDate":"2015-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Polyether Ether Ketone (PEEK) Fluidic Cell to Study Electrochemistry of Microelectrodes on Silicon Substrate\",\"authors\":\"A. Arun, C. Gupta, R. Howe\",\"doi\":\"10.1149/2.0021510SSL\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A robust fixture is designed as a fluidic cell, for studying electrochemistry of planar nano/microelectrodes and electrolyte interface. The microelectrode is fabricated using standard silicon micromachining processes on a silicon wafer. The fluidic cell is built using polyether ether ketone (PEEK). The PEEK structure is machined with alignment pins and the silicon wafer is fabricated with complementary alignment fields. This ensures that the electrodes on the silicon wafer are precisely aligned to the fluidic channel and there is minimal parasitic capacitance due to the overlap of the electrode with the conducting electrolyte in the system. The set-up was used to measure current flow across the electrode-electrolyte interface. Using the set-up gold-thiol interface of area with an opening of diameter 1 μm was characterized. © 2015 The Electrochemical Society. [DOI: 10.1149/2.0021510ssl] All rights reserved.\",\"PeriodicalId\":11423,\"journal\":{\"name\":\"ECS Solid State Letters\",\"volume\":\"99 1\",\"pages\":\"67\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-01-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"ECS Solid State Letters\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1149/2.0021510SSL\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"ECS Solid State Letters","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1149/2.0021510SSL","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1