On the Reliability Estimation of Analog CMOS Circuits Based on Statistical Methods

Since modern CMOS technologies are continuously scaling down, the analog circuit designers are faced to serious reliability problems in their designs. These problems are caused by physical effects such as hot carrier injection, negative and positive bias temperature instability (N/PBTI) and temperature dependent dielectric breakdown (TDDB). Therefore, it is an important factor for a robust design to estimate the deviations caused by these degradation mechanisms.Although digital signal processing is becoming increasingly more powerful and many types of signal processing have indeed moved to digital domain due to the advances in IC technology, analog circuits are still fundamentally necessary in many complex and high performance systems. This is caused by the reality that naturally occurring signals are analog. That means, analog circuits act as a bridge between the real world and digital systems. In analog signal processing, many circuit topologies including active filters, oscillators, immittance simulators etc. have been proposed in the literature which find a large application area, ranging from very low frequencies at several Hz levels to RF applications operating at GHz level; in other words, from biomedical and sonar signals to cognitive radio and encrypted communications.Several works have been performed on these degradation effects in MOS structures and appeared in the literature. Generally, physical models were proposed and used in most of the reliability studies. But, difficulties in preparation of physical models seem to be the most important disadvantages of these type models. As a result, statistical method based observation of experimental results have been introduced in some works to overcome these disadvantages of physical models.This talk deals with statistical methods for modelling of the degradation caused deviations in the drain current and threshold voltage of the NMOS and PMOS transistors. Using the observation results obtained, the effect of degradation was investigated statistically and new statistical methods were introduced to be an alternative to those given in the literature. The statistical models introduced are independent of the realization technology, exhibiting short simulation time and high accuracy. The accuracy is proven on circuit design examples from the real World. All data in this review is taken from the recent research works performed in Istanbul University and Istanbul Technical University.