C. Chan, Kuen-Yi Chen, Hao-Kai Peng, Yung-Hsien Wu
{"title":"基于高k光接口工程的大内存窗口和长脉冲循环耐用性的ffet存储器","authors":"C. Chan, Kuen-Yi Chen, Hao-Kai Peng, Yung-Hsien Wu","doi":"10.1109/VLSITechnology18217.2020.9265103","DOIUrl":null,"url":null,"abstract":"Without destabilizing the ferroelectric (FE) phase, high-k AlON with [N] of ~ 13 % was proposed as the interfacial layer (IL) between FE HfZrOx (HZO) and Si substrate for FeFET memory to enhance the memory window (MW) while improving reliability compared to SiO2 IL. The AlON-based memory shows promising performance in terms of a large MW of 3.1 V by ±4 V operation, long retention up to 10 years, and robust endurance up to 105 cycles with a long pulse width of 10−4 s, outstanding other FeFET memory devices. It is ascribed to the high k value and larger ΔEv that respectively allow a lower voltage drop across the IL and suppress hole trapping. [N] in the IL also enhances the thermal stability that Inhibits sub-IL formation by restraining the reaction of residual OH groups with Si substrate. Besides, the AlON and FE-HZO can be integrated in a single ALD step to simplify the process. From device performance and process viewpoints, AlON paves a promising avenue to enable more reliable and feasible FeFET memory.","PeriodicalId":6850,"journal":{"name":"2020 IEEE Symposium on VLSI Technology","volume":"5 1","pages":"1-2"},"PeriodicalIF":0.0000,"publicationDate":"2020-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"20","resultStr":"{\"title\":\"FeFET Memory Featuring Large Memory Window and Robust Endurance of Long-Pulse Cycling by Interface Engineerlng Using High-k AlON\",\"authors\":\"C. Chan, Kuen-Yi Chen, Hao-Kai Peng, Yung-Hsien Wu\",\"doi\":\"10.1109/VLSITechnology18217.2020.9265103\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Without destabilizing the ferroelectric (FE) phase, high-k AlON with [N] of ~ 13 % was proposed as the interfacial layer (IL) between FE HfZrOx (HZO) and Si substrate for FeFET memory to enhance the memory window (MW) while improving reliability compared to SiO2 IL. The AlON-based memory shows promising performance in terms of a large MW of 3.1 V by ±4 V operation, long retention up to 10 years, and robust endurance up to 105 cycles with a long pulse width of 10−4 s, outstanding other FeFET memory devices. It is ascribed to the high k value and larger ΔEv that respectively allow a lower voltage drop across the IL and suppress hole trapping. [N] in the IL also enhances the thermal stability that Inhibits sub-IL formation by restraining the reaction of residual OH groups with Si substrate. Besides, the AlON and FE-HZO can be integrated in a single ALD step to simplify the process. From device performance and process viewpoints, AlON paves a promising avenue to enable more reliable and feasible FeFET memory.\",\"PeriodicalId\":6850,\"journal\":{\"name\":\"2020 IEEE Symposium on VLSI Technology\",\"volume\":\"5 1\",\"pages\":\"1-2\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-06-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"20\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 IEEE Symposium on VLSI Technology\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSITechnology18217.2020.9265103\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE Symposium on VLSI Technology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSITechnology18217.2020.9265103","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
FeFET Memory Featuring Large Memory Window and Robust Endurance of Long-Pulse Cycling by Interface Engineerlng Using High-k AlON
Without destabilizing the ferroelectric (FE) phase, high-k AlON with [N] of ~ 13 % was proposed as the interfacial layer (IL) between FE HfZrOx (HZO) and Si substrate for FeFET memory to enhance the memory window (MW) while improving reliability compared to SiO2 IL. The AlON-based memory shows promising performance in terms of a large MW of 3.1 V by ±4 V operation, long retention up to 10 years, and robust endurance up to 105 cycles with a long pulse width of 10−4 s, outstanding other FeFET memory devices. It is ascribed to the high k value and larger ΔEv that respectively allow a lower voltage drop across the IL and suppress hole trapping. [N] in the IL also enhances the thermal stability that Inhibits sub-IL formation by restraining the reaction of residual OH groups with Si substrate. Besides, the AlON and FE-HZO can be integrated in a single ALD step to simplify the process. From device performance and process viewpoints, AlON paves a promising avenue to enable more reliable and feasible FeFET memory.