H. Arimura, E. Capogreco, K. Wostyn, G. Eneman, L. Ragnarsson, S. Brus, S. Baudot, A. Peter, T. Schram, P. Favia, O. Richard, H. Bender, J. Mitard, N. Horiguchi
{"title":"解决SiGe-pFin技术的关键挑战:翅片完整性,低dit无硅帽栅极堆栈和优化通道应变","authors":"H. Arimura, E. Capogreco, K. Wostyn, G. Eneman, L. Ragnarsson, S. Brus, S. Baudot, A. Peter, T. Schram, P. Favia, O. Richard, H. Bender, J. Mitard, N. Horiguchi","doi":"10.1109/VLSITechnology18217.2020.9265035","DOIUrl":null,"url":null,"abstract":"This paper shows the importance of oxygen control at the SiGe fin surface and within the gate stack. Optimized SiN liners are required to protect SiGe fins from oxidation during a flowable CVD (FCVD) densification anneal. Suppression of oxygen diffusion or scavenging from GeO via metal electrode is essential to achieve a low-D<inf>IT</inf> SiGe gate stack. By replacing HfO<inf>2</inf> with other dielectrics offering lower oxygen diffusivity, impact of metal electrode deposition process as well as the HfO<inf>2</inf> nitridation is corroborated to be related to the oxygen diffusivity. Finally, when using an embedded B-doped Si<inf>0.4</inf>Ge<inf>0.6</inf>S/D, higher channel strain in Si<inf>0.</inf><inf>7</inf>Ge<inf>0.3</inf> than in Si p-fins is obtained as predicted by TCAD.","PeriodicalId":6850,"journal":{"name":"2020 IEEE Symposium on VLSI Technology","volume":"2 1","pages":"1-2"},"PeriodicalIF":0.0000,"publicationDate":"2020-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"Addressing Key Challenges for SiGe-pFin Technologies: Fin Integrity, Low-DIT Si-cap-free Gate Stack and Optimizing the Channel Strain\",\"authors\":\"H. Arimura, E. Capogreco, K. Wostyn, G. Eneman, L. Ragnarsson, S. Brus, S. Baudot, A. Peter, T. Schram, P. Favia, O. Richard, H. Bender, J. Mitard, N. Horiguchi\",\"doi\":\"10.1109/VLSITechnology18217.2020.9265035\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper shows the importance of oxygen control at the SiGe fin surface and within the gate stack. Optimized SiN liners are required to protect SiGe fins from oxidation during a flowable CVD (FCVD) densification anneal. Suppression of oxygen diffusion or scavenging from GeO via metal electrode is essential to achieve a low-D<inf>IT</inf> SiGe gate stack. By replacing HfO<inf>2</inf> with other dielectrics offering lower oxygen diffusivity, impact of metal electrode deposition process as well as the HfO<inf>2</inf> nitridation is corroborated to be related to the oxygen diffusivity. Finally, when using an embedded B-doped Si<inf>0.4</inf>Ge<inf>0.6</inf>S/D, higher channel strain in Si<inf>0.</inf><inf>7</inf>Ge<inf>0.3</inf> than in Si p-fins is obtained as predicted by TCAD.\",\"PeriodicalId\":6850,\"journal\":{\"name\":\"2020 IEEE Symposium on VLSI Technology\",\"volume\":\"2 1\",\"pages\":\"1-2\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-06-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 IEEE Symposium on VLSI Technology\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSITechnology18217.2020.9265035\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE Symposium on VLSI Technology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSITechnology18217.2020.9265035","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Addressing Key Challenges for SiGe-pFin Technologies: Fin Integrity, Low-DIT Si-cap-free Gate Stack and Optimizing the Channel Strain
This paper shows the importance of oxygen control at the SiGe fin surface and within the gate stack. Optimized SiN liners are required to protect SiGe fins from oxidation during a flowable CVD (FCVD) densification anneal. Suppression of oxygen diffusion or scavenging from GeO via metal electrode is essential to achieve a low-DIT SiGe gate stack. By replacing HfO2 with other dielectrics offering lower oxygen diffusivity, impact of metal electrode deposition process as well as the HfO2 nitridation is corroborated to be related to the oxygen diffusivity. Finally, when using an embedded B-doped Si0.4Ge0.6S/D, higher channel strain in Si0.7Ge0.3 than in Si p-fins is obtained as predicted by TCAD.