低噪声高速自适应输出驱动器的设计过程

电路与系统学报 Pub Date : 1997-06-09 DOI:10.1109/ISCAS.1997.621494

C. Choy, C.F. Chan, M. Ku, J. Povazanec

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引用次数: 19

摘要

本文介绍了一种低功率母线噪声的高频输出驱动器的设计过程，该驱动器具有自动适应不同负载的结构。作为设计的第一阶段，对噪声幅值与驱动功率的关系进行了深入分析，并通过设计和制造的器件的仿真和测量结果支持了理论方法。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Design procedure of low-noise high-speed adaptive output drivers

This paper presents a design procedure of a high-frequency output driver with low power-bus noise and with an architecture which automatically adapts to different loading. In depth analysis of a noise amplitude versus driving power as a first stage of design is included and the theoretical approach is supported by simulation and measurement results of a designed and manufactured device.

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来源期刊

电路与系统学报

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2463