{"title":"TIQ Flash ADC比较器选择算法的动态规划优化","authors":"Ali Ozdemir, Mshabab Alrizah, Kyusun Choi","doi":"10.1109/ISVLSI.2019.00095","DOIUrl":null,"url":null,"abstract":"A Threshold Inverter Quantization (TIQ) architecture for Flash Analog to Digital Converters (ADCs) uses inverters as a voltage comparator. TIQ approach has many advantages over a differential voltage comparator, but it is hard to create and select comparators for it. Precise selection of gate switching voltage is crucial for Flash Analog to Digital Converters (ADCs). Therefore, Differential Non-Linearity (DNL) and Integral Non-Linearity (INL) error measurements are used to understand how precisely voltage comparators are selected. Different selection algorithms are used to make selection as precise as possible. In this work, we present two new algorithms based on a dynamic programming approach along with DNL and INL simulation results. Comparison with state-of-the-art methods, 4 times, and 5 times DNL improvements are achieved through the new approach for 6-bit and 8-bit respectively.","PeriodicalId":6703,"journal":{"name":"2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)","volume":"18 1","pages":"495-500"},"PeriodicalIF":0.0000,"publicationDate":"2019-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"Optimization of Comparator Selection Algorithm for TIQ Flash ADC Using Dynamic Programming Approach\",\"authors\":\"Ali Ozdemir, Mshabab Alrizah, Kyusun Choi\",\"doi\":\"10.1109/ISVLSI.2019.00095\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A Threshold Inverter Quantization (TIQ) architecture for Flash Analog to Digital Converters (ADCs) uses inverters as a voltage comparator. TIQ approach has many advantages over a differential voltage comparator, but it is hard to create and select comparators for it. Precise selection of gate switching voltage is crucial for Flash Analog to Digital Converters (ADCs). Therefore, Differential Non-Linearity (DNL) and Integral Non-Linearity (INL) error measurements are used to understand how precisely voltage comparators are selected. Different selection algorithms are used to make selection as precise as possible. In this work, we present two new algorithms based on a dynamic programming approach along with DNL and INL simulation results. Comparison with state-of-the-art methods, 4 times, and 5 times DNL improvements are achieved through the new approach for 6-bit and 8-bit respectively.\",\"PeriodicalId\":6703,\"journal\":{\"name\":\"2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)\",\"volume\":\"18 1\",\"pages\":\"495-500\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-07-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISVLSI.2019.00095\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISVLSI.2019.00095","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Optimization of Comparator Selection Algorithm for TIQ Flash ADC Using Dynamic Programming Approach
A Threshold Inverter Quantization (TIQ) architecture for Flash Analog to Digital Converters (ADCs) uses inverters as a voltage comparator. TIQ approach has many advantages over a differential voltage comparator, but it is hard to create and select comparators for it. Precise selection of gate switching voltage is crucial for Flash Analog to Digital Converters (ADCs). Therefore, Differential Non-Linearity (DNL) and Integral Non-Linearity (INL) error measurements are used to understand how precisely voltage comparators are selected. Different selection algorithms are used to make selection as precise as possible. In this work, we present two new algorithms based on a dynamic programming approach along with DNL and INL simulation results. Comparison with state-of-the-art methods, 4 times, and 5 times DNL improvements are achieved through the new approach for 6-bit and 8-bit respectively.