{"title":"一种适用于MOSFET紧凑型栅漏电流的通用划分方案","authors":"W. Shih, R. Rios, P. Packan, K. Mistry, T. Abbott","doi":"10.1109/IEDM.2001.979487","DOIUrl":null,"url":null,"abstract":"For the first time, it is rigorously shown that the source/drain partition of gate leakage current in a MOSFET is identical to that of inversion charge. This paper provides model developers a general recipe in addressing the partition issue and enables more consistent model parameter extraction methodology for MOSFETs in sub-100 nm technology.","PeriodicalId":13825,"journal":{"name":"International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224)","volume":"58 2 1","pages":"13.3.1-13.3.4"},"PeriodicalIF":0.0000,"publicationDate":"2001-12-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"28","resultStr":"{\"title\":\"A general partition scheme for gate leakage current suitable for MOSFET compact models\",\"authors\":\"W. Shih, R. Rios, P. Packan, K. Mistry, T. Abbott\",\"doi\":\"10.1109/IEDM.2001.979487\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"For the first time, it is rigorously shown that the source/drain partition of gate leakage current in a MOSFET is identical to that of inversion charge. This paper provides model developers a general recipe in addressing the partition issue and enables more consistent model parameter extraction methodology for MOSFETs in sub-100 nm technology.\",\"PeriodicalId\":13825,\"journal\":{\"name\":\"International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224)\",\"volume\":\"58 2 1\",\"pages\":\"13.3.1-13.3.4\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2001-12-02\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"28\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IEDM.2001.979487\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEDM.2001.979487","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A general partition scheme for gate leakage current suitable for MOSFET compact models
For the first time, it is rigorously shown that the source/drain partition of gate leakage current in a MOSFET is identical to that of inversion charge. This paper provides model developers a general recipe in addressing the partition issue and enables more consistent model parameter extraction methodology for MOSFETs in sub-100 nm technology.