用于3D可堆叠存储器的高耐用自热OTS-PCM柱电池

2018 IEEE Symposium on VLSI Technology Pub Date : 2018-06-01 DOI:10.1109/VLSIT.2018.8510621

C. Yeh, W. Chien, R. Bruce, H. Cheng, I. Kuo, C. Yang, A. Ray, H. Miyazoe, W. Kim, F. Carta, E. Lai, M. BrightSky, H. Lung

{"title":"用于3D可堆叠存储器的高耐用自热OTS-PCM柱电池","authors":"C. Yeh, W. Chien, R. Bruce, H. Cheng, I. Kuo, C. Yang, A. Ray, H. Miyazoe, W. Kim, F. Carta, E. Lai, M. BrightSky, H. Lung","doi":"10.1109/VLSIT.2018.8510621","DOIUrl":null,"url":null,"abstract":"For the first time published, high endurance OTS (ovonic threshold switch, here, TeAsGeSiSe-based) is integrated with PCM (here, doped Ge2Sb2Te5) to form a 3D stackable pillar type device. With the help of an etch buffer layer and a damage-free pillar RIE process, we achieved 100% array yield without OTS/PCM composition modification. Anneal tests show this one-selector/one-resistor (1S1R) pillar device is BEOL-compatible.We report excellent electrical performance by 1S1R OTS-PCM device; selector provides the fast turn on/off speed which enables 10ns fast RESET speed, program endurance is 109 cycles, and read endurance is higher than 1011 cycles.","PeriodicalId":6561,"journal":{"name":"2018 IEEE Symposium on VLSI Technology","volume":"418 1","pages":"205-206"},"PeriodicalIF":0.0000,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":"{\"title\":\"High Endurance Self-Heating OTS-PCM Pillar Cell for 3D Stackable Memory\",\"authors\":\"C. Yeh, W. Chien, R. Bruce, H. Cheng, I. Kuo, C. Yang, A. Ray, H. Miyazoe, W. Kim, F. Carta, E. Lai, M. BrightSky, H. Lung\",\"doi\":\"10.1109/VLSIT.2018.8510621\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"For the first time published, high endurance OTS (ovonic threshold switch, here, TeAsGeSiSe-based) is integrated with PCM (here, doped Ge2Sb2Te5) to form a 3D stackable pillar type device. With the help of an etch buffer layer and a damage-free pillar RIE process, we achieved 100% array yield without OTS/PCM composition modification. Anneal tests show this one-selector/one-resistor (1S1R) pillar device is BEOL-compatible.We report excellent electrical performance by 1S1R OTS-PCM device; selector provides the fast turn on/off speed which enables 10ns fast RESET speed, program endurance is 109 cycles, and read endurance is higher than 1011 cycles.\",\"PeriodicalId\":6561,\"journal\":{\"name\":\"2018 IEEE Symposium on VLSI Technology\",\"volume\":\"418 1\",\"pages\":\"205-206\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-06-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"10\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 IEEE Symposium on VLSI Technology\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIT.2018.8510621\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 IEEE Symposium on VLSI Technology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIT.2018.8510621","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 10

摘要

首次发表的高耐久性OTS(卵泡阈值开关，这里，基于teasgesise)与PCM(这里，掺杂Ge2Sb2Te5)集成，形成3D可堆叠柱型器件。在蚀刻缓冲层和无损伤柱RIE工艺的帮助下，我们在不修改OTS/PCM成分的情况下实现了100%的阵列良率。退火试验表明，这一选择器/一个电阻(1S1R)柱装置是beol兼容。我们报道了1S1R OTS-PCM器件优异的电气性能;选择器提供快速打开/关闭速度，使10ns快速复位速度，程序持续时间为109个周期，读取持续时间高于1011个周期。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文本刊更多论文

High Endurance Self-Heating OTS-PCM Pillar Cell for 3D Stackable Memory

For the first time published, high endurance OTS (ovonic threshold switch, here, TeAsGeSiSe-based) is integrated with PCM (here, doped Ge2Sb2Te5) to form a 3D stackable pillar type device. With the help of an etch buffer layer and a damage-free pillar RIE process, we achieved 100% array yield without OTS/PCM composition modification. Anneal tests show this one-selector/one-resistor (1S1R) pillar device is BEOL-compatible.We report excellent electrical performance by 1S1R OTS-PCM device; selector provides the fast turn on/off speed which enables 10ns fast RESET speed, program endurance is 109 cycles, and read endurance is higher than 1011 cycles.

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

2018 IEEE Symposium on VLSI Technology

自引率

0.00%

发文量