C. Woychik, J. Lauffer, S. Pollard, Rajvi Parmar, Michael Gaige, W. E. Wilson, James Carey, Matthew Neely, Feng Ling, Lijun Chen
{"title":"玻璃双工模块的特性和电性能","authors":"C. Woychik, J. Lauffer, S. Pollard, Rajvi Parmar, Michael Gaige, W. E. Wilson, James Carey, Matthew Neely, Feng Ling, Lijun Chen","doi":"10.4071/2380-4505-2019.1.000393","DOIUrl":null,"url":null,"abstract":"\n A process has been developed to manufacture a glass diplexer module using conventional laminate circuit board processes that have been adapted to handle glass substrates. Over the past few years we have evaluated both Cu plating and electrically conductive adhesives (ECAs) to produce a through glass via (TGV). From this work, it has been determined that Cu plating is a preferred process to form a robust TGV in a manufacturing environment. A Cu plated TGV nicely compliments our semi-additive plating (SAP) processes to produce fine line Cu circuitry on both sides of a glass substrate. In addition, we have successfully laminated an Ajinomoto Buildup Film (ABF) to both sides of a glass substrate having TGVs. The ABF completely filled the vias and also maintained uniform flatness on both sides. The resulting interposer was very flat and suitable for the next level of Cu plating using SAP. The ABF material was able to form high quality blind vias using laser drilling. A more comprehensive characterization of the glass diplexer modules will be presented, which will include X-sections of a double-sided Cu circuitry and Cu MIM (metal-insulator-metal) capacitors and inductors. In addition, the first set of electrical test data will be presented and compared with the modeling work done to date.","PeriodicalId":14363,"journal":{"name":"International Symposium on Microelectronics","volume":"18 1","pages":""},"PeriodicalIF":0.0000,"publicationDate":"2019-12-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Characterization and Electrical Performance of Glass Diplexer Modules\",\"authors\":\"C. Woychik, J. Lauffer, S. Pollard, Rajvi Parmar, Michael Gaige, W. E. Wilson, James Carey, Matthew Neely, Feng Ling, Lijun Chen\",\"doi\":\"10.4071/2380-4505-2019.1.000393\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"\\n A process has been developed to manufacture a glass diplexer module using conventional laminate circuit board processes that have been adapted to handle glass substrates. Over the past few years we have evaluated both Cu plating and electrically conductive adhesives (ECAs) to produce a through glass via (TGV). From this work, it has been determined that Cu plating is a preferred process to form a robust TGV in a manufacturing environment. A Cu plated TGV nicely compliments our semi-additive plating (SAP) processes to produce fine line Cu circuitry on both sides of a glass substrate. In addition, we have successfully laminated an Ajinomoto Buildup Film (ABF) to both sides of a glass substrate having TGVs. The ABF completely filled the vias and also maintained uniform flatness on both sides. The resulting interposer was very flat and suitable for the next level of Cu plating using SAP. The ABF material was able to form high quality blind vias using laser drilling. A more comprehensive characterization of the glass diplexer modules will be presented, which will include X-sections of a double-sided Cu circuitry and Cu MIM (metal-insulator-metal) capacitors and inductors. In addition, the first set of electrical test data will be presented and compared with the modeling work done to date.\",\"PeriodicalId\":14363,\"journal\":{\"name\":\"International Symposium on Microelectronics\",\"volume\":\"18 1\",\"pages\":\"\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-12-16\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"International Symposium on Microelectronics\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.4071/2380-4505-2019.1.000393\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"International Symposium on Microelectronics","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.4071/2380-4505-2019.1.000393","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Characterization and Electrical Performance of Glass Diplexer Modules
A process has been developed to manufacture a glass diplexer module using conventional laminate circuit board processes that have been adapted to handle glass substrates. Over the past few years we have evaluated both Cu plating and electrically conductive adhesives (ECAs) to produce a through glass via (TGV). From this work, it has been determined that Cu plating is a preferred process to form a robust TGV in a manufacturing environment. A Cu plated TGV nicely compliments our semi-additive plating (SAP) processes to produce fine line Cu circuitry on both sides of a glass substrate. In addition, we have successfully laminated an Ajinomoto Buildup Film (ABF) to both sides of a glass substrate having TGVs. The ABF completely filled the vias and also maintained uniform flatness on both sides. The resulting interposer was very flat and suitable for the next level of Cu plating using SAP. The ABF material was able to form high quality blind vias using laser drilling. A more comprehensive characterization of the glass diplexer modules will be presented, which will include X-sections of a double-sided Cu circuitry and Cu MIM (metal-insulator-metal) capacitors and inductors. In addition, the first set of electrical test data will be presented and compared with the modeling work done to date.