后处理技术提高SRAM的电池稳定性

2012 IEEE Silicon Nanoelectronics Workshop (SNW) Pub Date : 2012-06-10 DOI:10.1109/SNW.2012.6243348

Ashok Kumar, T. Saraya, S. Miyano, T. Hiramoto

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引用次数: 6

摘要

通过1k DMA SRAM TEG阵列的实验，验证了提高SRAM电池稳定性的后处理技术。结果表明，只要对VDD端子施加应力电压，不平衡单元的稳定性就会自动提高。通过测量应力前后各晶体管的VTH，分析了这一现象的机理，发现电池中较弱fet的VTH通过自完善机制被选择性地降低。

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Self-improvement of cell stability in SRAM by post fabrication technique

The post fabrication technique for self-improvement of SRAM cell stability is validated by experiment using 1k DMA SRAM TEG array. It is shown that the stability of unbalance cells is automatically improved by merely applying stress voltage to VDD terminal. The mechanism of the phenomena is also analyzed by measuring VTH of all transistors before and after stress and it is newly found that |VTH| of weaker PFET in the cell is selectively lowered by the self-improve mechanism.

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来源期刊

2012 IEEE Silicon Nanoelectronics Workshop (SNW)

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