基于LER、RDF和MGG的纳米晶体管统计变异性研究

G. Indalecio, A. García-Loureiro, M. Aldegunde, K. Kalna
{"title":"基于LER、RDF和MGG的纳米晶体管统计变异性研究","authors":"G. Indalecio, A. García-Loureiro, M. Aldegunde, K. Kalna","doi":"10.1109/CDE.2013.6481351","DOIUrl":null,"url":null,"abstract":"A 3D drift-diffusion device simulator with implemented density-gradient quantum corrections is developed to run hundreds of simulations to gather variability characteristics in non-planar transistors. We have included the line edge roughness (LER), random dopants (RD), and metal gate granularity (MGG) induced variabilities, which are considered to be the most important sources of variability in device characteristics. The simulator is then applied to study a threshold voltage variability in a 25 nm gate length Si SOI FinFET due to LER and MGG. We found that the LER induced threshold variability has a mean value of 344.5 mV and σ of 4.7 mV while the MGG induced has a mean value of 349.9 mV and σ of 13.3 mV an order of magnitude greater than the LER variability.","PeriodicalId":6614,"journal":{"name":"2013 Spanish Conference on Electron Devices","volume":"73 1","pages":"95-98"},"PeriodicalIF":0.0000,"publicationDate":"2013-03-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"Study of statistical variability in nanoscale transistors introduced by LER, RDF and MGG\",\"authors\":\"G. Indalecio, A. García-Loureiro, M. Aldegunde, K. Kalna\",\"doi\":\"10.1109/CDE.2013.6481351\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A 3D drift-diffusion device simulator with implemented density-gradient quantum corrections is developed to run hundreds of simulations to gather variability characteristics in non-planar transistors. We have included the line edge roughness (LER), random dopants (RD), and metal gate granularity (MGG) induced variabilities, which are considered to be the most important sources of variability in device characteristics. The simulator is then applied to study a threshold voltage variability in a 25 nm gate length Si SOI FinFET due to LER and MGG. We found that the LER induced threshold variability has a mean value of 344.5 mV and σ of 4.7 mV while the MGG induced has a mean value of 349.9 mV and σ of 13.3 mV an order of magnitude greater than the LER variability.\",\"PeriodicalId\":6614,\"journal\":{\"name\":\"2013 Spanish Conference on Electron Devices\",\"volume\":\"73 1\",\"pages\":\"95-98\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-03-21\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2013 Spanish Conference on Electron Devices\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CDE.2013.6481351\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 Spanish Conference on Electron Devices","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CDE.2013.6481351","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5

摘要

开发了一个三维漂移扩散器件模拟器,实现了密度梯度量子校正,可以运行数百个模拟来收集非平面晶体管的可变性特性。我们包括线边缘粗糙度(LER)、随机掺杂剂(RD)和金属栅粒度(MGG)引起的变化,它们被认为是器件特性变化的最重要来源。然后应用该模拟器研究了由LER和MGG引起的25 nm栅极长度Si SOI FinFET的阈值电压变化。结果表明,LER诱发的阈值变异性均值为344.5 mV, σ值为4.7 mV,而MGG诱发的阈值变异性均值为349.9 mV, σ值为13.3 mV,比LER诱发的阈值变异性大一个数量级。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Study of statistical variability in nanoscale transistors introduced by LER, RDF and MGG
A 3D drift-diffusion device simulator with implemented density-gradient quantum corrections is developed to run hundreds of simulations to gather variability characteristics in non-planar transistors. We have included the line edge roughness (LER), random dopants (RD), and metal gate granularity (MGG) induced variabilities, which are considered to be the most important sources of variability in device characteristics. The simulator is then applied to study a threshold voltage variability in a 25 nm gate length Si SOI FinFET due to LER and MGG. We found that the LER induced threshold variability has a mean value of 344.5 mV and σ of 4.7 mV while the MGG induced has a mean value of 349.9 mV and σ of 13.3 mV an order of magnitude greater than the LER variability.
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