基于双VCO技术的亚1g物联网宽量程锁相环设计

2020 IEEE 15th International Conference on Solid-State & Integrated Circuit Technology (ICSICT) Pub Date : 2020-11-03 DOI:10.1109/ICSICT49897.2020.9278135

Ming Wang, Miao-Xing Xie, Xianglong Li, Yabin Sun, Xiaojin Li, Yanfang Ding, Yanling Shi

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引用次数: 1

摘要

提出了一种适用于Sub-1G物联网(IoT)应用的宽范围电荷泵锁相环(CPPLL)。采用双压控振荡器(VCO)技术实现宽频率调谐范围。此外，结合双VCO结构，还采用了kvco补偿方法来稳定整个频率调谐范围内的Kvcoin。该锁相环采用CMOS 0.11µm工艺，实现了从54.8MHz到1.086GHz的宽频率调谐范围，芯片面积为0.8 mm2。在100kHz和1MHz时测得的相位噪声分别为-85.92dBc/Hz和-116.23dBc/Hz，在24MHz时测得的参考杂散为-63dBc。

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Design of A Wide-Range PLL Based on Dual VCO Technique for Sub-1G IoT Application

A wide-range charge pump phase-locked loop (CPPLL) for Sub-1G Internet-of-Things (IoT) application is proposed in this paper. Dual voltage-controlled oscillator (VCO) technique is adopted to achieve wide frequency tuning range. In addition, the Kvcocompensation method is also employed to stabilize Kvcoin the entire frequency tuning range, combined with dual VCO structure. The design has been fabricated in CMOS 0.11 µm technology and the presented PLL achieved a wide frequency tuning range from 54.8MHz to 1.086GHz, with die area of 0.8 mm2. The measured phase noise is -85.92dBc/Hz and -116.23dBc/Hz at 100kHz and 1MHz, respectively, and the measured reference spur is -63dBc at 24MHz.

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来源期刊

2020 IEEE 15th International Conference on Solid-State & Integrated Circuit Technology (ICSICT)

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