超高速SiGe NPN用于先进的BiCMOS技术

International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224) Pub Date : 2001-12-02 DOI:10.1109/IEDM.2001.979506

Marco Racanelli, K. Schuegraf, Amol Kalburge, A. Kar-Roy, B. Shen, Chenming Hu, D. Chapek, D. Howard, D. Quon, F. Wang, G. U'ren, L. Lao, H. Tu, J. Zheng, Jinshu Zhang, K. Bell, K. Yin, P. Joshi, S. Akhtar, S. Vo, T. Lee, W. Shi, P. Kempf

{"title":"超高速SiGe NPN用于先进的BiCMOS技术","authors":"Marco Racanelli, K. Schuegraf, Amol Kalburge, A. Kar-Roy, B. Shen, Chenming Hu, D. Chapek, D. Howard, D. Quon, F. Wang, G. U'ren, L. Lao, H. Tu, J. Zheng, Jinshu Zhang, K. Bell, K. Yin, P. Joshi, S. Akhtar, S. Vo, T. Lee, W. Shi, P. Kempf","doi":"10.1109/IEDM.2001.979506","DOIUrl":null,"url":null,"abstract":"A scalable SiGe NPN demonstrating Ft*BVceo product of 340 GHz-V with Ft of 170 GHz and BVceo of 2.0 V together with Fmax of 160 GHz is presented. Peak Ft is reached at a relatively low current density of 6 mA//spl mu/m/sup 2/. The device is integrated in a 0.18 /spl mu/m BiCMOS process with dual-gate MOS transistors, high voltage NPN transistors, MIM capacitors, metal resistors, and 6 layers of metal including two layers of thick Cu for improved interconnect and inductor performance.","PeriodicalId":13825,"journal":{"name":"International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224)","volume":"151 1","pages":"15.3.1-15.3.4"},"PeriodicalIF":0.0000,"publicationDate":"2001-12-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"80","resultStr":"{\"title\":\"Ultra high speed SiGe NPN for advanced BiCMOS technology\",\"authors\":\"Marco Racanelli, K. Schuegraf, Amol Kalburge, A. Kar-Roy, B. Shen, Chenming Hu, D. Chapek, D. Howard, D. Quon, F. Wang, G. U'ren, L. Lao, H. Tu, J. Zheng, Jinshu Zhang, K. Bell, K. Yin, P. Joshi, S. Akhtar, S. Vo, T. Lee, W. Shi, P. Kempf\",\"doi\":\"10.1109/IEDM.2001.979506\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A scalable SiGe NPN demonstrating Ft*BVceo product of 340 GHz-V with Ft of 170 GHz and BVceo of 2.0 V together with Fmax of 160 GHz is presented. Peak Ft is reached at a relatively low current density of 6 mA//spl mu/m/sup 2/. The device is integrated in a 0.18 /spl mu/m BiCMOS process with dual-gate MOS transistors, high voltage NPN transistors, MIM capacitors, metal resistors, and 6 layers of metal including two layers of thick Cu for improved interconnect and inductor performance.\",\"PeriodicalId\":13825,\"journal\":{\"name\":\"International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224)\",\"volume\":\"151 1\",\"pages\":\"15.3.1-15.3.4\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2001-12-02\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"80\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IEDM.2001.979506\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEDM.2001.979506","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 80

摘要

提出了一种可扩展的SiGe NPN，其Ft*BVceo产品为340 GHz-V, Ft为170 GHz, BVceo为2.0 V, Fmax为160 GHz。峰值Ft在相对较低的电流密度下达到6 mA//spl mu/m/sup 2/。该器件采用0.18 /spl mu/m BiCMOS工艺，采用双栅MOS晶体管、高压NPN晶体管、MIM电容器、金属电阻器和6层金属(包括两层厚Cu)集成，以提高互连和电感性能。

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Ultra high speed SiGe NPN for advanced BiCMOS technology

A scalable SiGe NPN demonstrating Ft*BVceo product of 340 GHz-V with Ft of 170 GHz and BVceo of 2.0 V together with Fmax of 160 GHz is presented. Peak Ft is reached at a relatively low current density of 6 mA//spl mu/m/sup 2/. The device is integrated in a 0.18 /spl mu/m BiCMOS process with dual-gate MOS transistors, high voltage NPN transistors, MIM capacitors, metal resistors, and 6 layers of metal including two layers of thick Cu for improved interconnect and inductor performance.

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International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224)

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