表征半导体器件扩散结的C-V参数提取技术

Miron J. Cristea, Florin Babarada
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引用次数: 4

摘要

考虑扩散结的高斯模型,从半导体结的电荷密度方程出发,得到了耗尽区宽度与势垒电容的新关系。基于这些关系,提出了一种新的C-V方法来分别提取半导体器件的半导体结参数。理论模型与实验数据吻合得很好。该技术可应用于许多具有扩散结的半导体器件,如p-n二极管、双极晶体管、晶闸管、igbt。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
C-V parameter extraction technique for characterisation the diffused junctions of semiconductor devices
Considering the Gaussian model for the diffused junctions and beginning with the electric charge density equation applied for the semiconductor junctions, new relations for the depletion region width and barrier capacitance were obtained. Based on these relations, a new C-V method to extract the parameters of semiconductor devices, respectively of semiconductor junctions is presented. A very good agreement was obtained between the theoretical model and experimental data. This technique can be applied to many semiconductor devices with diffused junctions, like p-n diodes, bipolar transistors, thyristors, IGBTs.
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