用于3D集成的5×50um硅通孔的制造和电学特性

2013 IEEE International Interconnect Technology Conference - IITC Pub Date : 2013-06-13 DOI:10.1109/IITC.2013.6615579

B. Bhushan, Minrui Yu, J. Dukovic, L. Wong, Aksel Kitowski, Mun Kvu Park, J. Hua, Shwetha Bolagond, A. Chan, C. Toh, A. Sundarrajan, Niranjan Kumar, S. Ramaswami

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引用次数: 14

摘要

我们介绍了用于3D集成的5×50um tsv的制造，电气特性和计量分析结果。具体而言，通过电容电压(CV)和电流电压(IV)测量来评估盲tsv的电气性能。提取了重要的电气参数，如氧化物电容、最小TSV电容、泄漏电流和击穿电压，并取得了良好的效果。电容值也与模型预测非常吻合。采用多种材料分析技术进一步验证了电气测试数据。

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Fabrication and electrical characterization of 5×50um through silicon vias for 3D integration

We present fabrication, electrical characterization, and metrology analysis results of 5×50um TSVs for 3D integration. Specifically, electrical performance of blind TSVs is evaluated by capacitance-voltage (CV) and current-voltage (IV) measurements. Important electrical parameters such as oxide capacitance, minimum TSV capacitance, leakage current, and breakdown voltage are extracted and show good results. The capacitance values also closely match model predictions. The electrical testing data are further verified with a variety of materials analysis techniques.

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2013 IEEE International Interconnect Technology Conference - IITC

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