晶圆电阻率对tsv制造工艺的影响

CAS 2012 (International Semiconductor Conference) Pub Date : 2012-10-01 DOI:10.1109/SMICND.2012.6400662

D. Vasilache, M. Chistè, S. Colpo, F. Giacomozzi, B. Margesin

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引用次数: 0

摘要

本文首次提出了硅电阻率对DRIE工艺的影响。我们的目标是开发一种通过硅孔(tsv)的锥形壁的新工艺，并能很好地控制壁角。使用不同的晶圆类型，发现电阻率的依赖关系，对tsv形状有重要影响。给出了解决方案，并进行了实验，得到了设计的tsv。

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Wafer resistivity influence over DRIE processes for TSVs manufacturing

This paper presents for the first time influence of the silicon resistivity over the DRIE processes. Our aim was to develop a new process for tapered walls through silicon vias (TSVs) with a good control over the walls angle. Different wafer types were used and a dependency of resistivity was found, with an important impact over the TSVs shape. Solution found is presented and experiments performed to obtained designed TSVs.

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CAS 2012 (International Semiconductor Conference)

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