{"title":"PVTMC:基于工艺变化的全数字亚皮秒定时测量电路","authors":"Shuo Li, Xiaolin Xu, W. Burleson","doi":"10.1109/ISVLSI.2019.00108","DOIUrl":null,"url":null,"abstract":"Measuring timing signals of sub-picosecond has become an urgent need in today's high-speed electronics design. However, conventional timing measurement devices are either built with analog circuits that are hard to integrate with digital systems or differential delay-lines whose resolution is significantly impacted by the process variations of a circuit or environmental conditions. In this work, we present a novel all-digital timing measurement circuit: PVTMC, which for the first time, constructively leverages process variations to measure timing signals of sub-picosecond duration. We show that PVTMC achieves high resolution and robust performance against environmental fluctuations. A simple random search-based method is proposed to speed up the measurements and improve its accuracy. We also demonstrate that PVTMC is compatible with most prevalent CMOS technology nodes, as well as FPGA implementations due to the existence of process variations.","PeriodicalId":6703,"journal":{"name":"2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)","volume":"10 1","pages":"574-579"},"PeriodicalIF":0.0000,"publicationDate":"2019-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"PVTMC: An All-Digital Sub-Picosecond Timing Measurement Circuit Based on Process Variations\",\"authors\":\"Shuo Li, Xiaolin Xu, W. Burleson\",\"doi\":\"10.1109/ISVLSI.2019.00108\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Measuring timing signals of sub-picosecond has become an urgent need in today's high-speed electronics design. However, conventional timing measurement devices are either built with analog circuits that are hard to integrate with digital systems or differential delay-lines whose resolution is significantly impacted by the process variations of a circuit or environmental conditions. In this work, we present a novel all-digital timing measurement circuit: PVTMC, which for the first time, constructively leverages process variations to measure timing signals of sub-picosecond duration. We show that PVTMC achieves high resolution and robust performance against environmental fluctuations. A simple random search-based method is proposed to speed up the measurements and improve its accuracy. We also demonstrate that PVTMC is compatible with most prevalent CMOS technology nodes, as well as FPGA implementations due to the existence of process variations.\",\"PeriodicalId\":6703,\"journal\":{\"name\":\"2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)\",\"volume\":\"10 1\",\"pages\":\"574-579\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-07-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISVLSI.2019.00108\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISVLSI.2019.00108","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
PVTMC: An All-Digital Sub-Picosecond Timing Measurement Circuit Based on Process Variations
Measuring timing signals of sub-picosecond has become an urgent need in today's high-speed electronics design. However, conventional timing measurement devices are either built with analog circuits that are hard to integrate with digital systems or differential delay-lines whose resolution is significantly impacted by the process variations of a circuit or environmental conditions. In this work, we present a novel all-digital timing measurement circuit: PVTMC, which for the first time, constructively leverages process variations to measure timing signals of sub-picosecond duration. We show that PVTMC achieves high resolution and robust performance against environmental fluctuations. A simple random search-based method is proposed to speed up the measurements and improve its accuracy. We also demonstrate that PVTMC is compatible with most prevalent CMOS technology nodes, as well as FPGA implementations due to the existence of process variations.