利用非平衡格林函数模拟研究10nm双栅MOSFET的设计和制造问题

Z. Ren, R. Venugopal, S. Datta, M. Lundstrom
{"title":"利用非平衡格林函数模拟研究10nm双栅MOSFET的设计和制造问题","authors":"Z. Ren, R. Venugopal, S. Datta, M. Lundstrom","doi":"10.1109/IEDM.2001.979435","DOIUrl":null,"url":null,"abstract":"The double gate (DG) MOSFET and similar structures provide the electrostatic integrity needed to scale devices to their limits. In this paper, we use a non-equilibrium Green's function (NEGF) approach to examine 10 nm-scale device design and manufacturing issues realistically. NEGF simulations are used to examine: (i) choice of body thickness, (ii) effect of body thickness variations, (iii) the required junction abruptness, (iv) sensitivity of the device to gate-S/D (source/drain) over/underlap, and (v) the impact of metal-semiconductor contact resistance. The results of this study identify key device challenges for 10 nm-scale MOSFETs.","PeriodicalId":13825,"journal":{"name":"International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224)","volume":"30 9 1","pages":"5.4.1-5.4.4"},"PeriodicalIF":0.0000,"publicationDate":"2001-12-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"43","resultStr":"{\"title\":\"Examination of design and manufacturing issues in a 10 nm double gate MOSFET using nonequilibrium Green's function simulation\",\"authors\":\"Z. Ren, R. Venugopal, S. Datta, M. Lundstrom\",\"doi\":\"10.1109/IEDM.2001.979435\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The double gate (DG) MOSFET and similar structures provide the electrostatic integrity needed to scale devices to their limits. In this paper, we use a non-equilibrium Green's function (NEGF) approach to examine 10 nm-scale device design and manufacturing issues realistically. NEGF simulations are used to examine: (i) choice of body thickness, (ii) effect of body thickness variations, (iii) the required junction abruptness, (iv) sensitivity of the device to gate-S/D (source/drain) over/underlap, and (v) the impact of metal-semiconductor contact resistance. The results of this study identify key device challenges for 10 nm-scale MOSFETs.\",\"PeriodicalId\":13825,\"journal\":{\"name\":\"International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224)\",\"volume\":\"30 9 1\",\"pages\":\"5.4.1-5.4.4\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2001-12-02\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"43\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IEDM.2001.979435\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEDM.2001.979435","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 43

摘要

双栅(DG) MOSFET和类似的结构提供了将器件扩展到其极限所需的静电完整性。在本文中,我们使用非平衡格林函数(NEGF)方法来实际检查10纳米级器件的设计和制造问题。NEGF模拟用于检查:(i)机身厚度的选择,(ii)机身厚度变化的影响,(iii)所需的结的突然度,(iv)器件对栅极s /D(源/漏)过/欠接的灵敏度,以及(v)金属半导体接触电阻的影响。本研究的结果确定了10纳米级mosfet的关键器件挑战。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Examination of design and manufacturing issues in a 10 nm double gate MOSFET using nonequilibrium Green's function simulation
The double gate (DG) MOSFET and similar structures provide the electrostatic integrity needed to scale devices to their limits. In this paper, we use a non-equilibrium Green's function (NEGF) approach to examine 10 nm-scale device design and manufacturing issues realistically. NEGF simulations are used to examine: (i) choice of body thickness, (ii) effect of body thickness variations, (iii) the required junction abruptness, (iv) sensitivity of the device to gate-S/D (source/drain) over/underlap, and (v) the impact of metal-semiconductor contact resistance. The results of this study identify key device challenges for 10 nm-scale MOSFETs.
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