Cross-Point OTS-PCM: IBM/Macronix相变存储器联合项目中的无验证多级单元(MLC)操作

2020 IEEE Symposium on VLSI Technology Pub Date : 2020-06-01 DOI:10.1109/VLSITechnology18217.2020.9265020

N. Gong, W. Chien, Y. Chou, C. Yeh, N. Li, H. Cheng, C. Cheng, I. Kuo, C. Yang, R. Bruce, A. Ray, L. Gignac, Y. Lin, C. Miller, T. Perri, W. Kim, L. Buzi, H. Utomo, F. Carta, E. Lai, H. Ho, H. Lung, M. BrightSky

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引用次数: 10

摘要

本文提出了OTS-PCM的第一个MLC运算，并对其运算算法进行了全面的研究。具有快速写入速度(109个周期)的ADM芯片显示了高性能MLC OTS-PCM的潜力。基于来自1Mbit交叉点阵列的100个单元数据，实现了理想的2位/单元操作，最多108个周期，无需进一步的读取验证。系统地讨论了“1/2V”方案下的MLC运行，并对阈值电压(Vt)漂移进行了评估。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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A no-verification Multi-Level-Cell (MLC) operation in Cross-Point OTS-PCM : IBM/Macronix Phase Change Memory Joint Project

We present the first MLC operation for OTS-PCM with comprehensive operation algorithm study. An ADM chip with fast write speed (<300ns) and robust operation (> 109 cycles) are shown indicating the potential for high performance MLC OTS-PCM. A desirable 2-bits/cell operation up to 108 cycles without further read verification is achieved based on 100 cells data from 1Mbit crosspoint array. Systematic discussions of MLC operation under “1/2V” scheme is further presented, and threshold voltage (Vt) drift is evaluated accordingly.

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2020 IEEE Symposium on VLSI Technology

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