利用栅极复制技术提高纳米电子电路的可靠性

2007 7th IEEE Conference on Nanotechnology (IEEE NANO) Pub Date : 2007-08-01 DOI:10.1109/NANO.2007.4601262

Chunhong Chen, F. Zhou

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引用次数: 0

摘要

使不可靠器件的数字电路更可靠一直是一个巨大的挑战，特别是对于今天的纳米电子电路设计。本文提出了一种门复制结构，以提高单个纳米级数字逻辑门的可靠性。我们着重推导了门复制与可靠性提高之间的基本关系，并报告了理论分析和实验结果。

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Towards reliability improvement for nanoelectronic circuits using gate replication

To make digital circuits with unreliable devices more reliable has been a big challenge, especially for today's nanoelectronic circuit design. This paper presents a gate replication architecture towards increasing the reliability of individual nano-scale digital logic gates. We focus on deriving the fundamental relationship between gate replication and reliability improvement, and report both theoretical analysis and experimental results.

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2007 7th IEEE Conference on Nanotechnology (IEEE NANO)

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