B. Tavel, X. Garros, T. Skotnicki, F. Martin, C. Leroux, D. Bensahel, M. Semeria, Y. Morand, J. Damlencourt, S. Descombes, F. Leverd, Y. Le-Friec, P. Leduc, M. Rivoire, S. Jullian, R. Pantel
{"title":"高性能40纳米nmosfet与HfO2栅极电介质和多晶硅damascene栅极","authors":"B. Tavel, X. Garros, T. Skotnicki, F. Martin, C. Leroux, D. Bensahel, M. Semeria, Y. Morand, J. Damlencourt, S. Descombes, F. Leverd, Y. Le-Friec, P. Leduc, M. Rivoire, S. Jullian, R. Pantel","doi":"10.1109/IEDM.2002.1175870","DOIUrl":null,"url":null,"abstract":"We report on 40 nm nMOS transistors with HfO/sub 2/ dielectric and polySi gate integrated into a damascene structure. We fabricated HfO/sub 2/ ALD layers with EOT down to 15 /spl Aring/, exhibiting leakage current more than two decades lower than SiO/sub 2/. Small mobility degradation on 2 nm EOT nMOSFETs was observed leading to the best performances (Ion= 680 /spl mu/A//spl mu/m @ Ioff=230 nA//spl mu/m) ever obtained with HfO/sub 2/ and polySi electrodes.","PeriodicalId":74909,"journal":{"name":"Technical digest. International Electron Devices Meeting","volume":"24 1","pages":"429-432"},"PeriodicalIF":0.0000,"publicationDate":"2002-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":"{\"title\":\"High performance 40 nm nMOSFETs with HfO2 gate dielectric and polysilicon damascene gate\",\"authors\":\"B. Tavel, X. Garros, T. Skotnicki, F. Martin, C. Leroux, D. Bensahel, M. Semeria, Y. Morand, J. Damlencourt, S. Descombes, F. Leverd, Y. Le-Friec, P. Leduc, M. Rivoire, S. Jullian, R. Pantel\",\"doi\":\"10.1109/IEDM.2002.1175870\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We report on 40 nm nMOS transistors with HfO/sub 2/ dielectric and polySi gate integrated into a damascene structure. We fabricated HfO/sub 2/ ALD layers with EOT down to 15 /spl Aring/, exhibiting leakage current more than two decades lower than SiO/sub 2/. Small mobility degradation on 2 nm EOT nMOSFETs was observed leading to the best performances (Ion= 680 /spl mu/A//spl mu/m @ Ioff=230 nA//spl mu/m) ever obtained with HfO/sub 2/ and polySi electrodes.\",\"PeriodicalId\":74909,\"journal\":{\"name\":\"Technical digest. International Electron Devices Meeting\",\"volume\":\"24 1\",\"pages\":\"429-432\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2002-12-08\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"10\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Technical digest. International Electron Devices Meeting\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IEDM.2002.1175870\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Technical digest. International Electron Devices Meeting","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEDM.2002.1175870","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
High performance 40 nm nMOSFETs with HfO2 gate dielectric and polysilicon damascene gate
We report on 40 nm nMOS transistors with HfO/sub 2/ dielectric and polySi gate integrated into a damascene structure. We fabricated HfO/sub 2/ ALD layers with EOT down to 15 /spl Aring/, exhibiting leakage current more than two decades lower than SiO/sub 2/. Small mobility degradation on 2 nm EOT nMOSFETs was observed leading to the best performances (Ion= 680 /spl mu/A//spl mu/m @ Ioff=230 nA//spl mu/m) ever obtained with HfO/sub 2/ and polySi electrodes.
求助内容：
应助结果提醒方式：
京公网安备 11010802042870号
