{"title":"集成光学IOs与asic的硅光子学技术平台","authors":"P. D. Dobbelaere","doi":"10.1109/HOTCHIPS.2013.7478308","DOIUrl":null,"url":null,"abstract":"• We highlighted Silicon Photonics Technology Platform and its scalability to increased data rates, higher interconnect densities and low system level power dissipation. • Silicon photonics has been in production since 2009 and has shipped > 500K+ chipsets for use in High Performance Computing and Datacenters. • We made the trade-off between hybrid and monolithic integration of photonics and electronics. Hybrid Silicon Photonics allows cost effective integration of photonics with advanced electronic nodes. • By integrating 3rd Party IP in the electronic IC, hybrid integration enables a first level of ASIC integration with Photonics. • A next level of ASIC integration is enabled by a “Silicon Photonics Interposer” where photonic capabilities are combined with hybrid integration with electronics and TSV technology.","PeriodicalId":6666,"journal":{"name":"2015 IEEE Hot Chips 27 Symposium (HCS)","volume":"46 1","pages":"1-18"},"PeriodicalIF":0.0000,"publicationDate":"2013-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Silicon Photonics Technology Platform for integration of optical IOs with ASICs\",\"authors\":\"P. D. Dobbelaere\",\"doi\":\"10.1109/HOTCHIPS.2013.7478308\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"• We highlighted Silicon Photonics Technology Platform and its scalability to increased data rates, higher interconnect densities and low system level power dissipation. • Silicon photonics has been in production since 2009 and has shipped > 500K+ chipsets for use in High Performance Computing and Datacenters. • We made the trade-off between hybrid and monolithic integration of photonics and electronics. Hybrid Silicon Photonics allows cost effective integration of photonics with advanced electronic nodes. • By integrating 3rd Party IP in the electronic IC, hybrid integration enables a first level of ASIC integration with Photonics. • A next level of ASIC integration is enabled by a “Silicon Photonics Interposer” where photonic capabilities are combined with hybrid integration with electronics and TSV technology.\",\"PeriodicalId\":6666,\"journal\":{\"name\":\"2015 IEEE Hot Chips 27 Symposium (HCS)\",\"volume\":\"46 1\",\"pages\":\"1-18\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-08-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 IEEE Hot Chips 27 Symposium (HCS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/HOTCHIPS.2013.7478308\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 IEEE Hot Chips 27 Symposium (HCS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/HOTCHIPS.2013.7478308","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Silicon Photonics Technology Platform for integration of optical IOs with ASICs
• We highlighted Silicon Photonics Technology Platform and its scalability to increased data rates, higher interconnect densities and low system level power dissipation. • Silicon photonics has been in production since 2009 and has shipped > 500K+ chipsets for use in High Performance Computing and Datacenters. • We made the trade-off between hybrid and monolithic integration of photonics and electronics. Hybrid Silicon Photonics allows cost effective integration of photonics with advanced electronic nodes. • By integrating 3rd Party IP in the electronic IC, hybrid integration enables a first level of ASIC integration with Photonics. • A next level of ASIC integration is enabled by a “Silicon Photonics Interposer” where photonic capabilities are combined with hybrid integration with electronics and TSV technology.