{"title":"多标准集成视频解码器的变换与量化电路设计","authors":"Seonyoung Lee, Kyeongsoon Cho","doi":"10.1109/SIPS.2007.4387541","DOIUrl":null,"url":null,"abstract":"This paper presents a new method to design the circuit that can perform the inverse transform and inverse quantization operations for three popular video compression standards WMV9, MPEG-4 and H.264. We introduced a delta coefficient matrix and implemented the integrated inverse transform circuit based on the proposed idea. We designed the integrated inverse quantization circuit using a shared multiplier. The entire circuit was verified on the SoC platform board, synthesized into a gate-level circuit using 130nm standard cell library and showed its efficiency in terms of the circuit size.","PeriodicalId":93225,"journal":{"name":"Proceedings. IEEE Workshop on Signal Processing Systems (2007-2014)","volume":"202 1","pages":"181-186"},"PeriodicalIF":0.0000,"publicationDate":"2007-11-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":"{\"title\":\"Design of Transform and Quantization Circuit for Multi-Standard Integrated Video Decoder\",\"authors\":\"Seonyoung Lee, Kyeongsoon Cho\",\"doi\":\"10.1109/SIPS.2007.4387541\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a new method to design the circuit that can perform the inverse transform and inverse quantization operations for three popular video compression standards WMV9, MPEG-4 and H.264. We introduced a delta coefficient matrix and implemented the integrated inverse transform circuit based on the proposed idea. We designed the integrated inverse quantization circuit using a shared multiplier. The entire circuit was verified on the SoC platform board, synthesized into a gate-level circuit using 130nm standard cell library and showed its efficiency in terms of the circuit size.\",\"PeriodicalId\":93225,\"journal\":{\"name\":\"Proceedings. IEEE Workshop on Signal Processing Systems (2007-2014)\",\"volume\":\"202 1\",\"pages\":\"181-186\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-11-21\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"9\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings. IEEE Workshop on Signal Processing Systems (2007-2014)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SIPS.2007.4387541\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. IEEE Workshop on Signal Processing Systems (2007-2014)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SIPS.2007.4387541","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Design of Transform and Quantization Circuit for Multi-Standard Integrated Video Decoder
This paper presents a new method to design the circuit that can perform the inverse transform and inverse quantization operations for three popular video compression standards WMV9, MPEG-4 and H.264. We introduced a delta coefficient matrix and implemented the integrated inverse transform circuit based on the proposed idea. We designed the integrated inverse quantization circuit using a shared multiplier. The entire circuit was verified on the SoC platform board, synthesized into a gate-level circuit using 130nm standard cell library and showed its efficiency in terms of the circuit size.