{"title":"基于创新多芯片模块(MCM) lqfn型封装技术的大电流(40A)同步降压转换器系统协同设计","authors":"T. Harrison, Jie Chen, R. Murugan","doi":"10.1109/ECTC.2019.00254","DOIUrl":null,"url":null,"abstract":"The drive for multi-chip module (MCM) packaging technology essentially stems from the ever-increasing demand for miniaturization of power electronics. While promising, MCM packaging technologies present considerable design challenges (viz. electrical, thermal, reliability and manufacturing/assembly) if system co-design techniques are not adopted early in the design process. In this paper we present the electrical system co-design and measurement validation results of a high-efficiency, single channel, integrated FET, synchronous buck converter packaged in a 40-pin 7.00mm × 5.00mm MCM-in-LQFN-type innovative package. Due to the complex 3D level of integration of the monolithic control, drive circuitry, and the two discrete N-channel NexFETTM power MOSFETs, electromagnetic interactions, between die, package, and PCB, are exacerbated with potential impact to system-level performance. We detail here how optimization of the system, was achieved through a coupled circuit-to-electromagnetic co-design modeling and simulation methodology. Laboratory measurements on an integrated high current (40A) synchronous step-down converter are presented that validate the integrity of the co-design modeling and simulation methodology.","PeriodicalId":6726,"journal":{"name":"2019 IEEE 69th Electronic Components and Technology Conference (ECTC)","volume":"245 1","pages":"1653-1659"},"PeriodicalIF":0.0000,"publicationDate":"2019-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"System Co-Design of a High Current (40A) Synchronous Step-Down Converter in an Innovative Multi-chip Module (MCM) LQFN-Type Packaging Technology\",\"authors\":\"T. Harrison, Jie Chen, R. Murugan\",\"doi\":\"10.1109/ECTC.2019.00254\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The drive for multi-chip module (MCM) packaging technology essentially stems from the ever-increasing demand for miniaturization of power electronics. While promising, MCM packaging technologies present considerable design challenges (viz. electrical, thermal, reliability and manufacturing/assembly) if system co-design techniques are not adopted early in the design process. In this paper we present the electrical system co-design and measurement validation results of a high-efficiency, single channel, integrated FET, synchronous buck converter packaged in a 40-pin 7.00mm × 5.00mm MCM-in-LQFN-type innovative package. Due to the complex 3D level of integration of the monolithic control, drive circuitry, and the two discrete N-channel NexFETTM power MOSFETs, electromagnetic interactions, between die, package, and PCB, are exacerbated with potential impact to system-level performance. We detail here how optimization of the system, was achieved through a coupled circuit-to-electromagnetic co-design modeling and simulation methodology. Laboratory measurements on an integrated high current (40A) synchronous step-down converter are presented that validate the integrity of the co-design modeling and simulation methodology.\",\"PeriodicalId\":6726,\"journal\":{\"name\":\"2019 IEEE 69th Electronic Components and Technology Conference (ECTC)\",\"volume\":\"245 1\",\"pages\":\"1653-1659\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-05-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2019 IEEE 69th Electronic Components and Technology Conference (ECTC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ECTC.2019.00254\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE 69th Electronic Components and Technology Conference (ECTC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ECTC.2019.00254","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
摘要
多芯片模块(MCM)封装技术的发展主要源于对电力电子器件小型化日益增长的需求。虽然MCM封装技术很有前途,但如果在设计过程的早期不采用系统协同设计技术,那么MCM封装技术将面临相当大的设计挑战(即电气、热、可靠性和制造/组装)。本文介绍了一种高效、单通道、集成FET、同步降压转换器的电气系统协同设计和测量验证结果,该转换器封装在40引脚7.00mm × 5.00mm mcm - In - lqfn型创新封装中。由于单片控制、驱动电路和两个分立n通道NexFETTM功率mosfet的复杂3D级集成,加剧了芯片、封装和PCB之间的电磁相互作用,并对系统级性能产生潜在影响。我们在这里详细介绍了如何通过耦合电路-电磁协同设计建模和仿真方法来实现系统的优化。对集成大电流(40A)同步降压转换器进行了实验室测量,验证了协同设计建模和仿真方法的完整性。
System Co-Design of a High Current (40A) Synchronous Step-Down Converter in an Innovative Multi-chip Module (MCM) LQFN-Type Packaging Technology
The drive for multi-chip module (MCM) packaging technology essentially stems from the ever-increasing demand for miniaturization of power electronics. While promising, MCM packaging technologies present considerable design challenges (viz. electrical, thermal, reliability and manufacturing/assembly) if system co-design techniques are not adopted early in the design process. In this paper we present the electrical system co-design and measurement validation results of a high-efficiency, single channel, integrated FET, synchronous buck converter packaged in a 40-pin 7.00mm × 5.00mm MCM-in-LQFN-type innovative package. Due to the complex 3D level of integration of the monolithic control, drive circuitry, and the two discrete N-channel NexFETTM power MOSFETs, electromagnetic interactions, between die, package, and PCB, are exacerbated with potential impact to system-level performance. We detail here how optimization of the system, was achieved through a coupled circuit-to-electromagnetic co-design modeling and simulation methodology. Laboratory measurements on an integrated high current (40A) synchronous step-down converter are presented that validate the integrity of the co-design modeling and simulation methodology.