具有减少设备数量的S连通梯形多级拓扑

IF 2.1 Q3 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
M. Madhu Shobini;D. Prince Winston;S. Satheesh Kumar;M. Pravin;A. G. Aakash;B. Gurukarthik Babu
{"title":"具有减少设备数量的S连通梯形多级拓扑","authors":"M. Madhu Shobini;D. Prince Winston;S. Satheesh Kumar;M. Pravin;A. G. Aakash;B. Gurukarthik Babu","doi":"10.1109/ICJECE.2022.3178177","DOIUrl":null,"url":null,"abstract":"Advancements in the field of multilevel converters (MLCs) recently have contributed to diverse electrical field applications such as electric vehicles, hybrid energy storage system, and smart grid. In the earlier stages of the basic MLC structure, a large number of switching devices were employed to obtain the replica of the sine wave. This article focuses on reducing the count of switching devices to half the quantity for a higher number of levels in the MLC structure. Proportionally, overall cost and operational complexity in power semiconductor switches get reduced remarkably providing stable operation. In this article, a new topology has been implemented from the knowledge of conventional converters and existing MLCs derived from literature. The proposed topology is designed with a reduced number of both switching devices and dc sources compared to the existing hybrid type and conventional converter structures. Its corresponding topology and mode of operations during each level are studied and the performances are also analyzed. Switching components’ requirement, switching state table and voltage stress, and total harmonic distortion (THD) values of the proposed topology were evaluated. The output five-level voltage has been generated using both MATLAB simulation and hardware experimental setup. The proposed topology with reduced device components exhibits its superior characteristics in all aspects.","PeriodicalId":100619,"journal":{"name":"IEEE Canadian Journal of Electrical and Computer Engineering","volume":"45 3","pages":"285-292"},"PeriodicalIF":2.1000,"publicationDate":"2022-08-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"S-Connected Ladder Fashion Multilevel Topology With Reduced Device Count\",\"authors\":\"M. Madhu Shobini;D. Prince Winston;S. Satheesh Kumar;M. Pravin;A. G. Aakash;B. Gurukarthik Babu\",\"doi\":\"10.1109/ICJECE.2022.3178177\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Advancements in the field of multilevel converters (MLCs) recently have contributed to diverse electrical field applications such as electric vehicles, hybrid energy storage system, and smart grid. In the earlier stages of the basic MLC structure, a large number of switching devices were employed to obtain the replica of the sine wave. This article focuses on reducing the count of switching devices to half the quantity for a higher number of levels in the MLC structure. Proportionally, overall cost and operational complexity in power semiconductor switches get reduced remarkably providing stable operation. In this article, a new topology has been implemented from the knowledge of conventional converters and existing MLCs derived from literature. The proposed topology is designed with a reduced number of both switching devices and dc sources compared to the existing hybrid type and conventional converter structures. Its corresponding topology and mode of operations during each level are studied and the performances are also analyzed. Switching components’ requirement, switching state table and voltage stress, and total harmonic distortion (THD) values of the proposed topology were evaluated. The output five-level voltage has been generated using both MATLAB simulation and hardware experimental setup. The proposed topology with reduced device components exhibits its superior characteristics in all aspects.\",\"PeriodicalId\":100619,\"journal\":{\"name\":\"IEEE Canadian Journal of Electrical and Computer Engineering\",\"volume\":\"45 3\",\"pages\":\"285-292\"},\"PeriodicalIF\":2.1000,\"publicationDate\":\"2022-08-24\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Canadian Journal of Electrical and Computer Engineering\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/9866588/\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q3\",\"JCRName\":\"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Canadian Journal of Electrical and Computer Engineering","FirstCategoryId":"1085","ListUrlMain":"https://ieeexplore.ieee.org/document/9866588/","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
引用次数: 1

摘要

近年来,多电平变换器(MLC)领域的进步为电动汽车、混合储能系统和智能电网等各种电气领域的应用做出了贡献。在基本MLC结构的早期阶段,使用了大量的开关器件来获得正弦波的副本。本文的重点是将切换设备的数量减少到MLC结构中更高级别数量的一半。相应地,功率半导体开关的总体成本和操作复杂性显著降低,从而提供稳定的操作。在本文中,根据传统转换器和现有文献中的MLC的知识,实现了一种新的拓扑结构。与现有的混合型和传统转换器结构相比,所提出的拓扑结构的开关器件和直流电源数量都有所减少。研究了其相应的拓扑结构和各个级别的操作模式,并对其性能进行了分析。对所提出拓扑的开关元件要求、开关状态表和电压应力以及总谐波失真(THD)值进行了评估。利用MATLAB仿真和硬件实验装置生成了输出的五电平电压。所提出的具有减少的器件组件的拓扑结构在各个方面都显示出其优越的特性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
S-Connected Ladder Fashion Multilevel Topology With Reduced Device Count
Advancements in the field of multilevel converters (MLCs) recently have contributed to diverse electrical field applications such as electric vehicles, hybrid energy storage system, and smart grid. In the earlier stages of the basic MLC structure, a large number of switching devices were employed to obtain the replica of the sine wave. This article focuses on reducing the count of switching devices to half the quantity for a higher number of levels in the MLC structure. Proportionally, overall cost and operational complexity in power semiconductor switches get reduced remarkably providing stable operation. In this article, a new topology has been implemented from the knowledge of conventional converters and existing MLCs derived from literature. The proposed topology is designed with a reduced number of both switching devices and dc sources compared to the existing hybrid type and conventional converter structures. Its corresponding topology and mode of operations during each level are studied and the performances are also analyzed. Switching components’ requirement, switching state table and voltage stress, and total harmonic distortion (THD) values of the proposed topology were evaluated. The output five-level voltage has been generated using both MATLAB simulation and hardware experimental setup. The proposed topology with reduced device components exhibits its superior characteristics in all aspects.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
CiteScore
3.70
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信