Reliability-Oriented Design of DC-Link Considering the Second-Order Harmonic Current Routing in an SST Cell

Second-order harmonic current (SHC) inevitably presents in the two-stage AC/DC and DC/DC system, e.g., solid-state transformer (SST) cell. Unregulated harmonics routing leads to reliability defects, which may appear in DC-link and DC/DC stage. This manuscript presents a reliability-oriented design method via routing the SHC. Firstly, the SHC distribution in the two-stage SST cell is modeled, and their effects on the reliability of DC-link capacitor and DC/DC stage are revealed. Interactions are highlighted between the reliability of DC-link and DC/DC stage. It illustrates that a small capacitance may favor the DC-link reliability, yet jeopardizing the overall system. A tradeoff analysis is performed to achieve longer mean time to failure (MTTF) on an SST cell level. The harmonic distribution unravels a new mechanism that governs the reliability balance between critical components. It also provides an alternative perspective to the reliability-oriented design. The distribution model and design framework are performed in a 15 kW SST cell.