连续时间流水线ADC:一种用于宽带数据转换的连续时间ADC

Hajime Shibata
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引用次数: 0

摘要

连续时间(CT)流水线模数转换器(ADC)是一种新兴的ADC架构,适用于全集成接收器应用中的宽带(BW)数字化。它继承了CT$\Delta\Sigma$ADC的集成友好特性,如固有的抗混叠,同时实现了源自离散时间(DT)流水线ADC的宽BW操作。在这篇综述文章中,我们介绍了一个以增益为中心的ADC模型,并应用从该模型导出的关键标准将DT流水线ADC转换为CT流水线ADC。然后,我们讨论了CT流水线ADC的设计注意事项和基本构建块。最后,我们考察了该体系结构的几个实现及其亮点和挑战。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Continuous-Time Pipelined ADC: A Breed of Continuous-Time ADCs for Wideband Data Conversion
The continuous-time (CT) pipelined analog-to-digital converter (ADC) is an emerging ADC architecture suitable for wide- bandwidth (BW) digitization in fully integrated receiver applications. It inherits the integration-friendly features of CT $\Delta \Sigma $ ADCs, such as inherent anti-aliasing, while achieving the wide- BW operation originating from discrete-time (DT) pipelined ADCs. In this review article, we introduce a gain-centric ADC model and apply the key criteria derived from the model to transform a DT pipelined ADC into a CT pipelined ADC. We then discuss the design considerations and essential building blocks of the CT pipelined ADC. Finally, we examine several implementations of this architecture with their highlights and challenges.
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