用于面板应用的低功耗系统的单体型TFT逻辑结构

Q Engineering

Journal of Display Technology Pub Date : 2016-11-01 DOI:10.1109/JDT.2016.2623651

Yifan Yang;Sungsik Lee;David Holburn;Arokia Nathan

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引用次数: 3

摘要

本文介绍了一种新型的用于增强模式的7-T伪CMOS和用于耗尽模式反相器的6-T伪CMOS电路结构。这些设计是围绕单体型TFT构建的，并且比现有的4-T伪CMOS电路消耗更少的功耗。此外，它们提供陡峭的传输曲线，以及用于补偿器件参数变化的嵌入式控制。分析了各种电路结构的瞬态行为，为考虑重叠电容影响的电容负载提供了定量的见解。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Mono-Type TFT Logic Architectures for Low Power Systems on Panel Applications

This paper introduces novel 7-T pseudo-CMOS for enhancement mode and 6-T pseudo-CMOS for depletion mode inverter circuit architectures. The designs are built around mono-type of TFTs and consume less power consumption than existing 4-T pseudo-CMOS circuits. In addition, they provide steep transfer curves, along with embedded control for compensation of device parameter variations. Analysis of the transient behavior for the various circuit architectures is presented, providing quantitative insight into capacitive loading taking into account the effects of overlap capacitances.

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来源期刊

Journal of Display Technology 工程技术-工程：电子与电气

CiteScore

1.50

自引率

0.00%

发文量

审稿时长

2.8 months

期刊介绍： This publication covers the theory, material, design, fabrication, manufacturing and application of information displays and aspects of display technology that emphasize the progress in device engineering, design and simulation, materials, electronics, physics, and reliability aspects of displays and the application of displays. The Journal is sponsored by EDS, seven other IEEE societies (BT, CES, CPMT, IA, IM, PHO and SSC) and the Optical Society of America (OSA).