High-Performamce Amorphous InGaZnO Thin-Film Transistor With ZrLaO Gate Dielectric Fabricated at Room Temperature

InGaZnO thin-film transistors (TFT) with ZrLaO as gate dielectric are investigated by varying the Zr/La ratio. The TFTs are prepared by in-situ sputtering at room temperature without any thermal treatment. As demonstrated by X-ray diffraction, the Zr incorporated in La2O3 can effectively suppress the crystallization of the La2O3 film, thus reducing the traps along its grain boundaries and improving its surface roughness. However, excessive Zr in the ZrLaO film degrades the TFT performance due to the formation of an interfacial layer and a remarkable reduction of carriers at the ZrLaO/IGZO interface, as confirmed by X-ray photoelectron spectroscopy. The TFT with appropriate Zr content (La/Zr = 6.9) shows the best performance with lowest threshold voltage (2.59 V), highest field-effect mobility (up to 67.2 cm ² /V·s), largest on-current (504 μA), highest on-off current ratio (4.80 × 10 ⁶ ), and smallest subthreshold swing (240 mV/dec).