一种基于子范围非均匀采样忆阻神经网络的模数转换器

Hao You , Amirali Amirsoleimani , Jianxiong Xu , Mostafa Rahimi Azghadi , Roman Genov
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引用次数: 4

摘要

这项工作提出了一种新的4位子范围非均匀采样(NUS)忆阻神经网络模数转换器(ADC),该转换器在速度、功率、面积和精度之间具有改进的性能权衡。所提出的设计保留了忆阻神经网络校准,并利用可训练的忆阻器权重来适应器件失配并提高精度。与传统的二进制搜索不同,我们在ADC中采用了四进制搜索来实现子范围结构的粗、细比特确定。在所提出的ADC中引入了电平交叉非均匀采样(NUS),以在相同的分辨率、功率和面积消耗下增强ENOB。通过比特确定的不同阶段之间的电路共享来减少面积和功耗。所提出的4位ADC在截止频率(128MHz)下实现了5.96和5.6的最高ENOB,功耗为0.515mW,品质因数(FoM)为82.95fJ/conv。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A subranging nonuniform sampling memristive neural network-based analog-to-digital converter

This work presents a novel 4-bit subranging nonuniform sampling (NUS) memristive neural network-based analog-to-digital converter (ADC) with improved performance trade-off among speed, power, area, and accuracy. The proposed design preserves the memristive neural network calibration and utilizes a trainable memristor weight to adapt to device mismatch and increase accuracy. Rather than conventional binary searching, we adopt quaternary searching in the ADC to realize subranging architecture’s coarse and fine bits determination. A level-crossing nonuniform sampling (NUS) is introduced to the proposed ADC to enhance the ENOB under the same resolutions, power, and area consumption. Area and power consumption are reduced through circuit sharing between different stages of bit determination. The proposed 4-bit ADC achieves a highest ENOB of 5.96 and 5.6 at cut-off frequency (128 MHz) with power consumption of 0.515 mW and a figure of merit (FoM) of 82.95 fJ/conv.

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