三门动态闪存（3G_DFM）设计对长空穴保持时间和鲁棒干扰屏蔽的影响

Memories - Materials, Devices, Circuits and Systems Pub Date : 2023-07-01 DOI:10.1016/j.memori.2023.100054

Koji Sakui, Yisuo Li, Masakazu Kakumu, Kenichi Kanazawa, Iwao Kunishima, Yoshihisa Iwata, Nozomu Harada

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引用次数: 0

摘要

使用Silvaco软件进行的TCAD模拟表明，在SL（源线）和BL（位线）之间具有SG1（选择门1）、PL（板线门）和SG2（选择门2）的3G_DFM在85°C下具有100ms的长保持时间，并且具有高达BL应力千倍的强大干扰屏蔽。两个选择栅极SG1和SG2保护SL和BL pn结处FB（浮体）中的空穴的复合，并屏蔽在其他页面操作期间产生的BL应力，这导致GIDL（栅极感应漏极泄漏）电流。

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Design impact on three gate Dynamic Flash Memory (3G_DFM) for long hole retention time and robust disturbance shield

TCAD simulation using Silvaco software has shown that the 3G_DFM, which has SG1 (Select Gate 1), PL (Plate Line Gate), and SG2 (Select Gate 2) between SL (Source Line) and BL (Bit Line), has a long retention time of 100ms at 85 °C, and a robust disturbance shield which is a thousand times BL stress. The two select gates SG1 and SG2 protect the recombination of holes in the FB (Floating Body) at the SL and BL pn-junctions, and shield the BL stress arising during other page operations, which leads to the GIDL (Gate Induced Drain Leakage) current.

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Memories - Materials, Devices, Circuits and Systems

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