基于CPU-GPU的嵌入式平台上开放计算语言应用程序的机器学习引导热管理

IF 1.1 4区 计算机科学 Q4 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
Rakesh Kumar, Bibhas Ghoshal
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引用次数: 2

摘要

随着嵌入式设备开始支持异构处理核心(基于中央处理器[CPU]-图形处理单元[GPU]的核心),性能感知任务分配成为一个主要问题。在CPU和GPU核心上使用开放计算语言(OpenCL)应用程序可以提高性能并解决问题。然而,它对系统的整体功耗和工作温度有不利影响。在高频下以小的形状因子操作这两种内核会导致功耗的上升,进而导致处理器温度的上升。升高的温度带来了重大的热问题。在本文中,我们对CPU在GPU特定应用程序执行过程中的作用进行了研究,并反对在高频率下运行它。此外,本研究还提出了一种机器学习引导机制,用于预测OpenCL GPU内核执行过程中CPU内核的最佳工作频率。我们在最先进的ODROID XU4嵌入式平台上对OpenCL应用程序进行的实验表明,如果实验板的CPU内核以我们基于机器学习的预测方法提出的频率运行,与基线频率相比,处理器温度降低约12.5°C,性能下降1.06%(嵌入式平台的默认性能调速器)。
本文章由计算机程序翻译,如有差异,请以英文原文为准。

Machine learning guided thermal management of Open Computing Language applications on CPU-GPU based embedded platforms

Machine learning guided thermal management of Open Computing Language applications on CPU-GPU based embedded platforms

As embedded devices start supporting heterogeneous processing cores (Central Processing Unit [CPU]–Graphical Processing Unit [GPU] based cores), performance aware task allocation becomes a major issue. Use of Open Computing Language (OpenCL) applications on both CPU and GPU cores improves performance and resolves the problem. However, it has an adverse effect on the overall power consumption and the operating temperature of the system. Operating both kind of cores within a small form factor at high frequency causes rise in power consumption which in turn leads to increase in processor temperature. The elevated temperature brings about major thermal issues. In this paper, we present our investigation on the role of CPU during execution of GPU specific application and argue against running it at the high frequency. In addition, a machine learning guided mechanism to predict the optimal operating frequency of CPU cores during execution of OpenCL GPU kernels is presented in this study. Our experiments with OpenCL applications on the state of the art ODROID XU4 embedded platform show that the CPU cores of the experimental board if operated at a frequency proposed by our Machine Learning-based predictive method brings about 12.5°C reduction in processor temperature at 1.06% degradation in performance compared to the baseline frequency (default performance frequency governor of the embedded platform).

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来源期刊
IET Computers and Digital Techniques
IET Computers and Digital Techniques 工程技术-计算机:理论方法
CiteScore
3.50
自引率
0.00%
发文量
12
审稿时长
>12 weeks
期刊介绍: IET Computers & Digital Techniques publishes technical papers describing recent research and development work in all aspects of digital system-on-chip design and test of electronic and embedded systems, including the development of design automation tools (methodologies, algorithms and architectures). Papers based on the problems associated with the scaling down of CMOS technology are particularly welcome. It is aimed at researchers, engineers and educators in the fields of computer and digital systems design and test. The key subject areas of interest are: Design Methods and Tools: CAD/EDA tools, hardware description languages, high-level and architectural synthesis, hardware/software co-design, platform-based design, 3D stacking and circuit design, system on-chip architectures and IP cores, embedded systems, logic synthesis, low-power design and power optimisation. Simulation, Test and Validation: electrical and timing simulation, simulation based verification, hardware/software co-simulation and validation, mixed-domain technology modelling and simulation, post-silicon validation, power analysis and estimation, interconnect modelling and signal integrity analysis, hardware trust and security, design-for-testability, embedded core testing, system-on-chip testing, on-line testing, automatic test generation and delay testing, low-power testing, reliability, fault modelling and fault tolerance. Processor and System Architectures: many-core systems, general-purpose and application specific processors, computational arithmetic for DSP applications, arithmetic and logic units, cache memories, memory management, co-processors and accelerators, systems and networks on chip, embedded cores, platforms, multiprocessors, distributed systems, communication protocols and low-power issues. Configurable Computing: embedded cores, FPGAs, rapid prototyping, adaptive computing, evolvable and statically and dynamically reconfigurable and reprogrammable systems, reconfigurable hardware. Design for variability, power and aging: design methods for variability, power and aging aware design, memories, FPGAs, IP components, 3D stacking, energy harvesting. Case Studies: emerging applications, applications in industrial designs, and design frameworks.
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