{"title":"从焊料表面张力模型得出的多芯片模块平面度要求","authors":"T. Marinis, J. W. Soucy","doi":"10.4071/IMAPS.526636","DOIUrl":null,"url":null,"abstract":"The number of die and routing layers in multichip modules and fan-out packages has been steadily increasing, which has exasperated the problem of maintaining module planarity for interconnect to a ...","PeriodicalId":35312,"journal":{"name":"Journal of Microelectronics and Electronic Packaging","volume":"2017 1","pages":"000727-000736"},"PeriodicalIF":0.0000,"publicationDate":"2017-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Multichip Module Planarity Requirements Derived From Solder Surface Tension Models\",\"authors\":\"T. Marinis, J. W. Soucy\",\"doi\":\"10.4071/IMAPS.526636\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The number of die and routing layers in multichip modules and fan-out packages has been steadily increasing, which has exasperated the problem of maintaining module planarity for interconnect to a ...\",\"PeriodicalId\":35312,\"journal\":{\"name\":\"Journal of Microelectronics and Electronic Packaging\",\"volume\":\"2017 1\",\"pages\":\"000727-000736\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-11-03\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Journal of Microelectronics and Electronic Packaging\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.4071/IMAPS.526636\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q4\",\"JCRName\":\"Engineering\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Journal of Microelectronics and Electronic Packaging","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.4071/IMAPS.526636","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q4","JCRName":"Engineering","Score":null,"Total":0}
Multichip Module Planarity Requirements Derived From Solder Surface Tension Models
The number of die and routing layers in multichip modules and fan-out packages has been steadily increasing, which has exasperated the problem of maintaining module planarity for interconnect to a ...
期刊介绍:
The International Microelectronics And Packaging Society (IMAPS) is the largest society dedicated to the advancement and growth of microelectronics and electronics packaging technologies through professional education. The Society’s portfolio of technologies is disseminated through symposia, conferences, workshops, professional development courses and other efforts. IMAPS currently has more than 4,000 members in the United States and more than 4,000 international members around the world.