J. Lau, G. Chen, C. Yang, Vincet Teng, A. Peng, J. Huang, N. Liu, Y. Chen, TJ Tseng, Ming Li
{"title":"用于异构集成的混合衬底","authors":"J. Lau, G. Chen, C. Yang, Vincet Teng, A. Peng, J. Huang, N. Liu, Y. Chen, TJ Tseng, Ming Li","doi":"10.1115/1.4062993","DOIUrl":null,"url":null,"abstract":"\n The hybrid substrate (organic interposer + build-up package substrate + solder joints + underfill) of multiple systems and heterogeneous integration is investigated. The organic interposer of the hybrid substrate is fabricated by a fan-out chip-last on a temporary panel with two different kinds of dielectric materials, namely the PID (photoimageable dielectric) and the ABF (Ajinomoto Build-Up Film). These two hybrid substrates are supporting two different chips. The flatness of metal lines of the RDLs (redistribution-layers), the quality of the hybrid substrate after chip-to-hybrid substrate bonding, and the reliability of the solder joints between these two hybrid substrates will be discussed.","PeriodicalId":15663,"journal":{"name":"Journal of Electronic Packaging","volume":" ","pages":""},"PeriodicalIF":2.2000,"publicationDate":"2023-07-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Hybrid Substrates For Heterogeneous Integration\",\"authors\":\"J. Lau, G. Chen, C. Yang, Vincet Teng, A. Peng, J. Huang, N. Liu, Y. Chen, TJ Tseng, Ming Li\",\"doi\":\"10.1115/1.4062993\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"\\n The hybrid substrate (organic interposer + build-up package substrate + solder joints + underfill) of multiple systems and heterogeneous integration is investigated. The organic interposer of the hybrid substrate is fabricated by a fan-out chip-last on a temporary panel with two different kinds of dielectric materials, namely the PID (photoimageable dielectric) and the ABF (Ajinomoto Build-Up Film). These two hybrid substrates are supporting two different chips. The flatness of metal lines of the RDLs (redistribution-layers), the quality of the hybrid substrate after chip-to-hybrid substrate bonding, and the reliability of the solder joints between these two hybrid substrates will be discussed.\",\"PeriodicalId\":15663,\"journal\":{\"name\":\"Journal of Electronic Packaging\",\"volume\":\" \",\"pages\":\"\"},\"PeriodicalIF\":2.2000,\"publicationDate\":\"2023-07-20\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Journal of Electronic Packaging\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://doi.org/10.1115/1.4062993\",\"RegionNum\":4,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q3\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Journal of Electronic Packaging","FirstCategoryId":"5","ListUrlMain":"https://doi.org/10.1115/1.4062993","RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
The hybrid substrate (organic interposer + build-up package substrate + solder joints + underfill) of multiple systems and heterogeneous integration is investigated. The organic interposer of the hybrid substrate is fabricated by a fan-out chip-last on a temporary panel with two different kinds of dielectric materials, namely the PID (photoimageable dielectric) and the ABF (Ajinomoto Build-Up Film). These two hybrid substrates are supporting two different chips. The flatness of metal lines of the RDLs (redistribution-layers), the quality of the hybrid substrate after chip-to-hybrid substrate bonding, and the reliability of the solder joints between these two hybrid substrates will be discussed.
期刊介绍:
The Journal of Electronic Packaging publishes papers that use experimental and theoretical (analytical and computer-aided) methods, approaches, and techniques to address and solve various mechanical, materials, and reliability problems encountered in the analysis, design, manufacturing, testing, and operation of electronic and photonics components, devices, and systems.
Scope: Microsystems packaging; Systems integration; Flexible electronics; Materials with nano structures and in general small scale systems.