Switching waveform design with gate charge control for power MOSFETs

The switching waveform design, especially controlling and optimizing the slew rate, is an efficient technique to mitigate the trade-off between decreasing the loss and increasing the noise of the switching power device. The digital active gate driver which generates the gate waveform to achieve the designed switching waveform requires a significant computational burden because the optimum driving point is searched automatically and comprehensively. This paper proposes a novel and simple method to calculate gate waveforms to achieve the designed switching waveforms. This method calculates how much gate charge is additionally required to match the designed waveform by exploiting the voltage and current response of the power device to the small gate charge pulse. The validation of this method is demonstrated by simulation in the case of both the drain-source voltage design and the drain current design. The deviation from the designed waveform is quantified in this paper.