时钟嵌入式面板内接口，超过8K显示的数据开销为1.96%

IF 1.7 4区工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC

Journal of the Society for Information Display Pub Date : 2023-05-02 DOI:10.1002/jsid.1225

Yong-Yun Park, Won-Ho Jang, Kyong-Ho Kim, Kyungho Ryu, Jung-Pil Lim, Yongil Kwon, Hyun-Wook Lim, Jae-Youl Lee

{"title":"时钟嵌入式面板内接口，超过8K显示的数据开销为1.96%","authors":"Yong-Yun Park, Won-Ho Jang, Kyong-Ho Kim, Kyungho Ryu, Jung-Pil Lim, Yongil Kwon, Hyun-Wook Lim, Jae-Youl Lee","doi":"10.1002/jsid.1225","DOIUrl":null,"url":null,"abstract":"<p>This paper proposes a 6Gb/s receiver for 8K displays and beyond. In the proposed receiver, a novel channel coding with 1.96% overhead is presented to guarantee minimum run-length in the clock embedded interface. It can also reduce bandwidth for effective data transmission compared to 9b/10b coding that requires 11.11% overhead. Furthermore, we present an on-chip eye margin tester that can measure the internal timing margin of receiver with only 1% area overhead. The prototype ICs are implemented using 0.18-μm HVCMOS process and evaluated in an 8K 65-in. panel.</p>","PeriodicalId":49979,"journal":{"name":"Journal of the Society for Information Display","volume":"31 5","pages":"241-252"},"PeriodicalIF":1.7000,"publicationDate":"2023-05-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A clock embedded intra-panel interface with 1.96% data overhead for beyond 8K displays\",\"authors\":\"Yong-Yun Park, Won-Ho Jang, Kyong-Ho Kim, Kyungho Ryu, Jung-Pil Lim, Yongil Kwon, Hyun-Wook Lim, Jae-Youl Lee\",\"doi\":\"10.1002/jsid.1225\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<p>This paper proposes a 6Gb/s receiver for 8K displays and beyond. In the proposed receiver, a novel channel coding with 1.96% overhead is presented to guarantee minimum run-length in the clock embedded interface. It can also reduce bandwidth for effective data transmission compared to 9b/10b coding that requires 11.11% overhead. Furthermore, we present an on-chip eye margin tester that can measure the internal timing margin of receiver with only 1% area overhead. The prototype ICs are implemented using 0.18-μm HVCMOS process and evaluated in an 8K 65-in. panel.</p>\",\"PeriodicalId\":49979,\"journal\":{\"name\":\"Journal of the Society for Information Display\",\"volume\":\"31 5\",\"pages\":\"241-252\"},\"PeriodicalIF\":1.7000,\"publicationDate\":\"2023-05-02\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Journal of the Society for Information Display\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://onlinelibrary.wiley.com/doi/10.1002/jsid.1225\",\"RegionNum\":4,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q3\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Journal of the Society for Information Display","FirstCategoryId":"5","ListUrlMain":"https://onlinelibrary.wiley.com/doi/10.1002/jsid.1225","RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}

引用次数: 0

摘要

本文提出了一种适用于8K及以上显示器的6Gb/s接收机。在所提出的接收器中，提出了一种开销为1.96%的新型信道编码，以确保时钟嵌入式接口中的最小游程长度。与需要11.11%开销的9b/10b编码相比，它还可以减少有效数据传输的带宽。此外，我们提出了一种片上眼裕度测试仪，该测试仪只需1%的面积开销就可以测量接收器的内部时序裕度。原型IC使用0.18μm HVCMOS工艺实现，并在8K 65英寸中进行评估。面板

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文本刊更多论文

A clock embedded intra-panel interface with 1.96% data overhead for beyond 8K displays

This paper proposes a 6Gb/s receiver for 8K displays and beyond. In the proposed receiver, a novel channel coding with 1.96% overhead is presented to guarantee minimum run-length in the clock embedded interface. It can also reduce bandwidth for effective data transmission compared to 9b/10b coding that requires 11.11% overhead. Furthermore, we present an on-chip eye margin tester that can measure the internal timing margin of receiver with only 1% area overhead. The prototype ICs are implemented using 0.18-μm HVCMOS process and evaluated in an 8K 65-in. panel.

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

Journal of the Society for Information Display 工程技术-材料科学：综合

CiteScore

4.80

自引率

8.70%

发文量

审稿时长

3 months

期刊介绍： The Journal of the Society for Information Display publishes original works dealing with the theory and practice of information display. Coverage includes materials, devices and systems; the underlying chemistry, physics, physiology and psychology; measurement techniques, manufacturing technologies; and all aspects of the interaction between equipment and its users. Review articles are also published in all of these areas. Occasional special issues or sections consist of collections of papers on specific topical areas or collections of full length papers based in part on oral or poster presentations given at SID sponsored conferences.