POETS:耗散粒子动力学的事件驱动方法

Pub Date : 2023-02-20 DOI:10.1145/3580372
Andrew D. Brown, J. Beaumont, David B. Thomas, J. Shillcock, Matthew Naylor, Graeme M. Bragg, Mark L. Vousden, S. Moore, Shane T. Fleming
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引用次数: 1

摘要

无论是在资本成本还是能源消耗方面,高性能计算集群都变得越来越昂贵;一些估计表明,在未来十年末,竞争性的安装将需要他们自己的发电站。解决这个迫在眉睫的问题的一种方法是设计定制的计算引擎,但是,虽然性能优势很好,但设计成本巨大,而且不易分摊。部分有序事件触发系统(partial Ordered Event Triggered System, poet)——本文的重点——寻求一种中间方法:架构被调整到特定的算法模式,但在该约束下,是完全可编程的。poet软件是准命令式的:用户定义一组顺序的事件处理程序,定义这些事件的并发集合(通常很大)的拓扑结构,并让它们进行交互。“解”可能从整体的涌现行为中渗漏出来。在这篇文章中,我们(简要地)描述了体系结构,以及一个计算化学应用的例子,耗散粒子动力学(DPD)。DPD算法传统上是使用并行计算技术实现的,但我们将其重新定义为一个并发计算问题,然后非常适合于poet。我们的原型系统是在48个fpga的集群上实现的,提供50K并发硬件线程,我们报告的性能速度比单线程基准比较器好两个数量级以上,并且伸缩行为几乎是恒定的。根据“常规”实现对结果进行验证。
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POETS: An Event-driven Approach to Dissipative Particle Dynamics
HPC clusters have become ever more expensive, both in terms of capital cost and energy consumption; some estimates suggest that competitive installations at the end of the next decade will require their own power station. One way around this looming problem is to design bespoke computing engines, but while the performance benefits are good, the design costs are huge and cannot easily be amortized. Partially Ordered Event Triggered System (POETS)—the focus of this article—seeks to exploit a middle way: The architecture is tuned to a specific algorithmic pattern but, within that constraint, is fully programmable. POETS software is quasi-imperative: The user defines a set of sequential event handlers, defines the topology of a (typically large) concurrent ensemble of these, and lets them interact. The “solution” may be exfiltrated from the emergent behaviour of the ensemble. In this article, we describe (briefly) the architecture, and an example computational chemistry application, dissipative particle dynamics (DPD). The DPD algorithm is traditionally implemented using parallel computational techniques, but we re-cast it as a concurrent compute problem that is then ideally suited to POETS. Our prototype system is realised on a cluster of 48 FPGAs providing 50K concurrent hardware threads, and we report performance speedups of over two orders of magnitude better than a single thread baseline comparator and scaling behaviour that is almost constant. The results are validated against a “conventional” implementation.
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