一种基于连通性的标准单元布局合法化方案

Antonios N. Dadaliaris, P. Oikonomou, M. Koziri, Evangelia Nerantzaki, Thanasis Loukopoulos, G. Stamoulis
{"title":"一种基于连通性的标准单元布局合法化方案","authors":"Antonios N. Dadaliaris, P. Oikonomou, M. Koziri, Evangelia Nerantzaki, Thanasis Loukopoulos, G. Stamoulis","doi":"10.4236/CS.2017.88013","DOIUrl":null,"url":null,"abstract":"Standard cell placement algorithms have been at the forefront of academic research concerning the physical design stages of VLSI design flows. The penultimate step of a standard cell placement procedure is legalization. In this step the manufacturability of the design is directly settled, and the quality of the solution, in terms of wirelength, congestion, timing and power consumption is indirectly defined. Since the heavy lifting regarding processing is performed by global placers, fast legalization solutions are protruded in state-of-the-art design flows. In this paper we propose and evaluate a legalization scheme that surpasses in execution speed two of the most widely used legalizers, without not only corrupting the quality of the final solution in terms of interconnection wirelength but improving it in the process.","PeriodicalId":63422,"journal":{"name":"电路与系统(英文)","volume":"08 1","pages":"191-201"},"PeriodicalIF":0.0000,"publicationDate":"2017-08-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"A Connectivity-Based Legalization Scheme for Standard Cell Placement\",\"authors\":\"Antonios N. Dadaliaris, P. Oikonomou, M. Koziri, Evangelia Nerantzaki, Thanasis Loukopoulos, G. Stamoulis\",\"doi\":\"10.4236/CS.2017.88013\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Standard cell placement algorithms have been at the forefront of academic research concerning the physical design stages of VLSI design flows. The penultimate step of a standard cell placement procedure is legalization. In this step the manufacturability of the design is directly settled, and the quality of the solution, in terms of wirelength, congestion, timing and power consumption is indirectly defined. Since the heavy lifting regarding processing is performed by global placers, fast legalization solutions are protruded in state-of-the-art design flows. In this paper we propose and evaluate a legalization scheme that surpasses in execution speed two of the most widely used legalizers, without not only corrupting the quality of the final solution in terms of interconnection wirelength but improving it in the process.\",\"PeriodicalId\":63422,\"journal\":{\"name\":\"电路与系统(英文)\",\"volume\":\"08 1\",\"pages\":\"191-201\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-08-28\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"电路与系统(英文)\",\"FirstCategoryId\":\"1093\",\"ListUrlMain\":\"https://doi.org/10.4236/CS.2017.88013\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"电路与系统(英文)","FirstCategoryId":"1093","ListUrlMain":"https://doi.org/10.4236/CS.2017.88013","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4

摘要

在超大规模集成电路设计流程的物理设计阶段,标准单元布局算法一直处于学术研究的前沿。标准细胞放置程序的倒数第二步是合法化。在这一步骤中,直接确定了设计的可制造性,并间接定义了解决方案在线路长度、拥塞、时序和功耗方面的质量。由于处理方面的繁重工作由全球砂矿商执行,因此在最先进的设计流程中突出了快速合法化解决方案。在本文中,我们提出并评估了一种合法化方案,该方案的执行速度超过了两种最广泛使用的合法化器,不仅不会在互连线路长度方面损害最终解决方案的质量,而且在过程中也不会提高质量。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A Connectivity-Based Legalization Scheme for Standard Cell Placement
Standard cell placement algorithms have been at the forefront of academic research concerning the physical design stages of VLSI design flows. The penultimate step of a standard cell placement procedure is legalization. In this step the manufacturability of the design is directly settled, and the quality of the solution, in terms of wirelength, congestion, timing and power consumption is indirectly defined. Since the heavy lifting regarding processing is performed by global placers, fast legalization solutions are protruded in state-of-the-art design flows. In this paper we propose and evaluate a legalization scheme that surpasses in execution speed two of the most widely used legalizers, without not only corrupting the quality of the final solution in terms of interconnection wirelength but improving it in the process.
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