Copper Bonding Technology in Heterogeneous Integration

As semiconductor device scaling faces a severe technical bottleneck, vertical die stacking technologies have been developed to obtain high performance, high density, low latency, cost effectiveness and a small form factor. This stacking technology is receiving great attention from industry as a core technology from the point of view of recent heterogeneous integration technology. Most importantly, bonding using copper is aggressively studied to stack various wafers or dies and realize genuine three-dimensional packaging. Copper is emerging as the most attractive bonding material due to its fine-pitch patternability and high electrical performance with a CMOS-friendly process. Unfortunately, copper is quickly oxidized, and a high bonding temperature is required for complete Cu bonding, which greatly exceeds the thermal budget for the packaging process. Additionally, the size of Cu pads is decreasing to increase the density of interconnections. Therefore, various copper bonding methods have been studied to realize copper oxidation prevention, a low bonding temperature, and a fine-pitch Cu pad structure with a high density. Furthermore, recently, hybrid bonding, which refers to the simultaneous bonding of copper pads and surrounding dielectrics, has been considered a possible solution for advanced bonding technology. This paper reviews recent studies on various copper bonding technologies, including Cu/oxide hybrid bonding.

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