Maximum Peak Current and Junction-to-ambient Delta-temperature Investigation in GaN FETs Parallel Connection

In power inverter applications, Gallium Nitride (GaN) technology demonstrates advantages of energy conversion quality, power density, and efficiency, such as in medium to high switching frequency motor drive. The parallel connection of GaN FETs increases the current capability of power switches. In the parallel connection, wide threshold voltage $V_{\mathrm{GSth}}$ spread of GaN FETs is the main parameter to consider. This paper investigates peak current and thermal response depending on the number $N$ of GaN FETs connected in parallel and the operating conditions. This study provides new insights for the design of a board with a large number of paralleled GaN FETs. The target is to show how the peak current and the maximum junction-to-ambient delta-temperature are related to the $V_{\mathrm{GSth}}$ spread. In order to separate the PCB or parasitic impedance effects from the device parameter spread one into the analysis, it was agreed to proceed by running simulations with a validated GaN FET model. A comparison between the maximum spread declared in the datasheet, to the typical one that can be found on the same production lot is carried out. Furthermore, switching operation and temperature evaluations are analyzed.