基于量子元胞自动机的线反馈移位寄存器设计方法

IF 1.8 Q3 MATERIALS SCIENCE, MULTIDISCIPLINARY
Mingliang Zhang;Xiaokuo Yang;Huanqing Cui;Zhigang Gu;Zhenglin Han
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引用次数: 2

摘要

量子点元胞自动机(QCA)在新兴的纳米逻辑电路中具有很大的优势。然而,在QCA顺序电路中,反馈设计往往是一个大问题。特别是在行反馈移位寄存器(LFSR)中,每个反馈回路至少由一个模2加法器和一个触发单元组成,这是传统方法难以实现的。鉴于LFSR在通信系统中的重要性,本文提出了一种基于QCA的设计方法。首先,提出了一种新的结构,用于每个单反馈LFSR,因为它可以使反馈环路只消耗一个时钟周期的延迟。随后,提出了定量准则来判断是否可以使用所提出的结构直接设计任何多反馈LFSR。不能满足这些条件的LFSR应该被转换成它们的等价形式。根据在伽罗瓦域GF(2)上搜索单调不可约多项式的定理,证明了任意LFSR都可以转化为单反馈类型,并考虑到各种情况,给出了将多反馈转化为单反馈的分步方法。此外,针对多到单变换方法中时钟延迟呈指数增长的问题,提出了另外两种简单的变换方法。这一系列方法最显著的优点是避免将不需要的位引入顺序电路中的有效负载数据流中。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A Design Methodology of Line Feedback Shift Registers With Quantum Cellular Automata
The quantum-dot cellular automata (QCA) present great promising advantages for emerging nano logic circuits. However, feedback design in QCA sequential circuit is often a big problem. Especially in line feedback shift registers (LFSR), each feedback loop consists of at least a modulo-2 adder and a trigger unit, which is hard to implement using the conventional methods. Given the importance of LFSR in communication systems, a design methodology with QCA is proposed in this work. At first, a new structure is presented to be used in every single feedback LFSR since it can make the feedback loop consume only one clock cycle of delay. Subsequently, quantitative criteria are presented to judge whether any multi-feedback LFSR can be directly designed using the proposed structure. LFSR that cannot satisfy the criteria are supposed to be transformed to their equivalent forms. We verify any LFSR can be transformed to the type of single feedback, according to the theorem of searching the monic and irreducible polynomials over Galois field GF (2). The step-by-step method of transforming multi-feedback into single feedback is given on the consideration of all kinds of cases. Further, two other simple transforming methods are presented to cope with the exponential growth of clock delay in the multi-to-single transforming method. The most remarkable advantage of this series of methods is to keep from introducing undesired bits into the payload data flowing in the sequential circuits.
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来源期刊
CiteScore
3.90
自引率
17.60%
发文量
10
审稿时长
12 weeks
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